portugalfuturista/openwrt-pf
2
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions 2

qualcommax: pcs-qca-uniphy: take the USXGMII link from the receiver

Browse source 
qca_uniphy_pcs_get_state_usxgmii() took the link from the USXGMII code
word's link bit. An AQR113C behind this XPCS never asserts it:
autonegotiation completes, the code word tracks the copper rate as the
media renegotiates and reports full duplex, and the link bit stays clear
the whole time.

Once the port is marked as in-band managed that bit becomes the carrier
gate, so the port never gets carrier, link_up() never runs, the port MAC
is never enabled and the XPCS keeps its 10G reset default.

Take the link from the 10GBASE-R receiver instead, the way
qca_uniphy_pcs_get_state_10base_r() does. It answers the only question a
PCS can answer on its own, whether the system interface is up. The code
word stays the speed source: the Aquantia driver reports RATE_MATCH_NONE
for USXGMII, so phylink does not substitute the PHY's speed and this is
where the port's rate comes from. The link bit is kept as an_complete,
which is what it actually describes.

Confirmed on a QNAP QHora-301w, where 10g-1 now reaches carrier against a
1G link partner and configures an address.

Signed-off-by: Rudy Andram <rmandrad@gmail.com>
Signed-off-by: Julius Bairaktaris <julius@bairaktaris.de>
Link: https://github.com/openwrt/openwrt/pull/24420
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Rudy Andram 2026-07-27 12:32:38 +02:00 committed by Robert Marko
parent be89f6298d
commit dd78f34eba
1 changed files with 12 additions and 4 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

16
target/linux/qualcommax/files/drivers/net/pcs/pcs-qca-uniphy.c
View file

@ -356,16 +356,24 @@ static void qca_uniphy_pcs_get_state_usxgmii(struct qca_uniphy *uniphy,
unsigned int val;
int ret;
ret = regmap_read(uniphy->regmap, XPCS_KR_STS1, &val);
if (ret) {
state->link = 0;
return;
}
state->link = !!(val & XPCS_KR_STS1_PLU);
if (!state->link)
return;
ret = regmap_read(uniphy->regmap, XPCS_MII_AN_INTR_STS, &val);
if (ret) {
state->link = 0;
return;
}
state->link = !!(val & XPCS_USXG_AN_LINK_STS);
if (!state->link)
return;
state->an_complete = !!(val & XPCS_USXG_AN_LINK_STS);
switch (FIELD_GET(XPCS_USXG_AN_SPEED_MASK, val)) {
case XPCS_USXG_AN_SPEED_10000: