9f2dec7ef9
This is an automatically generated commit which aids following Kernel patch history, as git will see the move and copy as a rename thus defeating the purpose. For the original discussion see: https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html Signed-off-by: Julius Bairaktaris <julius@bairaktaris.de> Link: https://github.com/openwrt/openwrt/pull/24031 Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
36 lines
1.2 KiB
Diff
36 lines
1.2 KiB
Diff
From b410d25fb349bc32132749bd2cb17aa17054287d Mon Sep 17 00:00:00 2001
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From: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
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Date: Wed, 17 Sep 2025 15:49:00 +0400
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Subject: arm64: dts: qcom: ipq5018: add QUP1 UART2 node
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Add node to support the second UART node controller in IPQ5018.
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Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
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Signed-off-by: George Moussalem <george.moussalem@outlook.com>
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Link: https://lore.kernel.org/r/20250917-ipq5018-uart2-v1-1-f8680bbf947f@outlook.com
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Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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---
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arch/arm64/boot/dts/qcom/ipq5018.dtsi | 10 ++++++++++
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1 file changed, 10 insertions(+)
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(limited to 'arch/arm64/boot/dts/qcom/ipq5018.dtsi')
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--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
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@@ -490,6 +490,16 @@
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status = "disabled";
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};
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+ blsp1_uart2: serial@78b0000 {
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+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
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+ reg = <0x078b0000 0x200>;
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+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
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+ <&gcc GCC_BLSP1_AHB_CLK>;
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+ clock-names = "core", "iface";
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+ status = "disabled";
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+ };
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+
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blsp1_spi1: spi@78b5000 {
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compatible = "qcom,spi-qup-v2.2.1";
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#address-cells = <1>;
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