9f2dec7ef9
This is an automatically generated commit which aids following Kernel patch history, as git will see the move and copy as a rename thus defeating the purpose. For the original discussion see: https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html Signed-off-by: Julius Bairaktaris <julius@bairaktaris.de> Link: https://github.com/openwrt/openwrt/pull/24031 Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
48 lines
2 KiB
Diff
48 lines
2 KiB
Diff
From 97eb2ac52726fbb702ced40d552a3f6f2683b664 Mon Sep 17 00:00:00 2001
|
|
From: John Crispin <john@phrozen.org>
|
|
Date: Wed, 11 Mar 2026 19:39:39 +0100
|
|
Subject: [PATCH] clk: qcom: ipq-cmn-pll: Add IPQ6018 SoC support
|
|
|
|
The CMN PLL in IPQ6018 SoC supplies fixed clocks to the networking
|
|
subsystem: bias_pll_cc_clk at 300 MHz and bias_pll_nss_noc_clk at
|
|
416.5 MHz.
|
|
|
|
Signed-off-by: John Crispin <john@phrozen.org>
|
|
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Link: https://lore.kernel.org/r/20260311183942.10134-3-ansuelsmth@gmail.com
|
|
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
|
|
---
|
|
drivers/clk/qcom/ipq-cmn-pll.c | 8 ++++++++
|
|
1 file changed, 8 insertions(+)
|
|
|
|
--- a/drivers/clk/qcom/ipq-cmn-pll.c
|
|
+++ b/drivers/clk/qcom/ipq-cmn-pll.c
|
|
@@ -52,6 +52,7 @@
|
|
#include <dt-bindings/clock/qcom,ipq-cmn-pll.h>
|
|
#include <dt-bindings/clock/qcom,ipq5018-cmn-pll.h>
|
|
#include <dt-bindings/clock/qcom,ipq5424-cmn-pll.h>
|
|
+#include <dt-bindings/clock/qcom,ipq6018-cmn-pll.h>
|
|
|
|
#define CMN_PLL_REFCLK_SRC_SELECTION 0x28
|
|
#define CMN_PLL_REFCLK_SRC_DIV GENMASK(9, 8)
|
|
@@ -118,6 +119,12 @@ static const struct cmn_pll_fixed_output
|
|
{ /* Sentinel */ }
|
|
};
|
|
|
|
+static const struct cmn_pll_fixed_output_clk ipq6018_output_clks[] = {
|
|
+ CLK_PLL_OUTPUT(IPQ6018_BIAS_PLL_CC_CLK, "bias_pll_cc_clk", 300000000UL),
|
|
+ CLK_PLL_OUTPUT(IPQ6018_BIAS_PLL_NSS_NOC_CLK, "bias_pll_nss_noc_clk", 416500000UL),
|
|
+ { /* Sentinel */ }
|
|
+};
|
|
+
|
|
static const struct cmn_pll_fixed_output_clk ipq5424_output_clks[] = {
|
|
CLK_PLL_OUTPUT(IPQ5424_XO_24MHZ_CLK, "xo-24mhz", 24000000UL),
|
|
CLK_PLL_OUTPUT(IPQ5424_SLEEP_32KHZ_CLK, "sleep-32khz", 32000UL),
|
|
@@ -449,6 +456,7 @@ static const struct dev_pm_ops ipq_cmn_p
|
|
static const struct of_device_id ipq_cmn_pll_clk_ids[] = {
|
|
{ .compatible = "qcom,ipq5018-cmn-pll", .data = &ipq5018_output_clks },
|
|
{ .compatible = "qcom,ipq5424-cmn-pll", .data = &ipq5424_output_clks },
|
|
+ { .compatible = "qcom,ipq6018-cmn-pll", .data = &ipq6018_output_clks },
|
|
{ .compatible = "qcom,ipq9574-cmn-pll", .data = &ipq9574_output_clks },
|
|
{ }
|
|
};
|