This is an automatically generated commit which aids following Kernel patch history, as git will see the move and copy as a rename thus defeating the purpose. For the original discussion see: https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html Signed-off-by: Julius Bairaktaris <julius@bairaktaris.de> Link: https://github.com/openwrt/openwrt/pull/24031 Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
66 lines
1.9 KiB
Diff
66 lines
1.9 KiB
Diff
From fea4ae4b5b5059612d1a4f5acb88c27a5f7e60dc Mon Sep 17 00:00:00 2001
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From: George Moussalem <george.moussalem@outlook.com>
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Date: Mon, 8 Jun 2026 09:09:17 +0400
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Subject: [PATCH] dt-bindings: net: qca,ar803x: Add clocks for IPQ5018 PHY
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Further testing revealed that the RX and TX clocks of the IPQ5018 PHY
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need to be explicitly enabled. As such, add the required clocks to the
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schema.
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Acked-by: Conor Dooley <conor.dooley@microchip.com>
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Signed-off-by: George Moussalem <george.moussalem@outlook.com>
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Link: https://patch.msgid.link/20260608-ipq5018-gephy-clocks-v4-2-fb2ccd56894b@outlook.com
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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.../devicetree/bindings/net/qca,ar803x.yaml | 19 +++++++++++++++++++
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1 file changed, 19 insertions(+)
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--- a/Documentation/devicetree/bindings/net/qca,ar803x.yaml
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+++ b/Documentation/devicetree/bindings/net/qca,ar803x.yaml
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@@ -28,6 +28,16 @@ allOf:
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reg:
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const: 7 # This PHY is always at MDIO address 7 in the IPQ5018 SoC
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+ clocks:
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+ items:
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+ - description: RX clock
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+ - description: TX clock
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+
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+ clock-names:
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+ items:
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+ - const: rx
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+ - const: tx
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+
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resets:
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items:
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- description:
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@@ -42,6 +52,11 @@ allOf:
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of this PHY are directly connected to an RJ45 connector.
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type: boolean
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+ required:
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+ - clocks
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+ - clock-names
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+ - resets
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+
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properties:
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compatible:
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enum:
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@@ -162,6 +177,7 @@ examples:
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};
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};
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- |
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+ #include <dt-bindings/clock/qcom,gcc-ipq5018.h>
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#include <dt-bindings/reset/qcom,gcc-ipq5018.h>
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mdio {
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@@ -172,6 +188,9 @@ examples:
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compatible = "ethernet-phy-id004d.d0c0";
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reg = <7>;
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+ clocks = <&gcc GCC_GEPHY_RX_CLK>,
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+ <&gcc GCC_GEPHY_TX_CLK>;
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+ clock-names = "rx", "tx";
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resets = <&gcc GCC_GEPHY_MISC_ARES>;
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};
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};
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