ca8d931205
Since f1f0572d1 ("remove redundant integrated phy attribute") the
phy-is-integrated attribute of an phy in the dts is obsolete.
This was important for the INTERNAL_PHY() macro. Now it is
useless. Convert the macro to its successor PHY_C22().
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22892
Signed-off-by: Robert Marko <robimarko@gmail.com>
162 lines
2.6 KiB
Text
162 lines
2.6 KiB
Text
// SPDX-License-Identifier: GPL-2.0-or-later
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#include "rtl838x.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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compatible = "realtek,rtl838x-soc";
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aliases {
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label-mac-device = ðernet0;
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x8000000>;
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};
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keys {
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pinctrl-names = "default";
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pinctrl-0 = <&pinmux_disable_sys_led>;
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compatible = "gpio-keys";
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mode {
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label = "reset";
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gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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gpio-restart {
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compatible = "gpio-restart";
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gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
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open-source;
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};
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};
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&mdio_aux {
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status = "okay";
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gpio1: expander@31 {
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compatible = "realtek,rtl8231";
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reg = <31>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&gpio1 0 0 37>;
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led-controller {
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compatible = "realtek,rtl8231-leds";
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status = "disabled";
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};
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};
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};
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&mdio_bus0 {
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PHY_C22(8, 8)
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PHY_C22(9, 9)
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PHY_C22(10, 10)
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PHY_C22(11, 11)
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PHY_C22(12, 12)
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PHY_C22(13, 13)
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PHY_C22(14, 14)
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PHY_C22(15, 15)
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <50000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0000000 0x00e0000>;
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read-only;
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};
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partition@e0000 {
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label = "u-boot-env";
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reg = <0x00e0000 0x0010000>;
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nvmem-layout {
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compatible = "u-boot,env";
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macaddr_ubootenv_ethaddr: ethaddr {
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#nvmem-cell-cells = <1>;
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};
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};
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};
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partition@f0000 {
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label = "u-boot-env2";
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reg = <0x00f0000 0x0010000>;
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};
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partition@100000 {
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label = "jffs";
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reg = <0x0100000 0x0100000>;
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read-only;
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};
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partition@200000 {
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label = "jffs2";
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reg = <0x0200000 0x0100000>;
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read-only;
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};
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firmware: partition@300000 {
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label = "firmware";
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compatible = "openwrt,uimage", "denx,uimage";
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reg = <0x0300000 0x0e80000>;
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};
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partition@1180000 {
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label = "runtime2";
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reg = <0x1180000 0x0e80000>;
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read-only;
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};
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};
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};
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};
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ðernet0 {
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nvmem-cells = <&macaddr_ubootenv_ethaddr 0>;
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nvmem-cell-names = "mac-address";
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};
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&switch0 {
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ethernet-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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SWITCH_PORT(8, 1, internal)
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SWITCH_PORT(9, 2, internal)
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SWITCH_PORT(10, 3, internal)
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SWITCH_PORT(11, 4, internal)
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SWITCH_PORT(12, 5, internal)
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SWITCH_PORT(13, 6, internal)
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SWITCH_PORT(14, 7, internal)
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SWITCH_PORT(15, 8, internal)
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port@28 {
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ethernet = <ðernet0>;
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reg = <28>;
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phy-mode = "internal";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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