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openwrt-pf/target/linux/qualcommax/dts/ipq8072-301w.dts
Julius Bairaktaris f4a7ae107e qualcommax: enable in-band signalling on the USXGMII ports 
USXGMII carries the line rate to the MAC in a Clause 37 code word, so the
link needs in-band signalling. Without "managed" the port is PHY managed,
phylink disables in-band on the PHY, and with the PCS now honouring
neg_mode neither end runs autonegotiation, so nothing crosses the system
interface.

Every USXGMII port in this target was missing the property: ten ports
across eight boards, all of them an Aquantia PHY on copper, none of them
an SFP cage. ipq8074-rt-ax89x already carried "in-band-status" on its
SGMII lan8, which is why a file-level search made it look covered.

Only the two ports on ipq8072-301w have been tested on hardware. The
remaining eight are the same PHY family behind the same PCS, are broken
today for the same reason, and cannot regress from a state where they
pass no traffic, but they have not been confirmed on a board.

That test ran on the 6.18 testing kernel, where phylink switches the PHY
side on through phy_config_inband(). On 6.12 the PHY has no such op and
0760-net-phy-aquantia-enable-USXGMII-MAC-autoneg.patch forces the same
bit unconditionally, so the end state matches, but no board has confirmed
it there.

Tested-by: Rudy Andram <rmandrad@gmail.com>
Assisted-by: Claude:claude-opus-5
Signed-off-by: Julius Bairaktaris <julius@bairaktaris.de>
Link: https://github.com/openwrt/openwrt/pull/24420
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-08-06 12:45:27 +02:00

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/* Copyright (c) 2021, Dirk Buchwalder <buchwalder@posteo.de> */
/dts-v1/;
#include "ipq8074.dtsi"
#include "ipq8074-hk-cpu.dtsi"
#include "ipq8074-ess.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
model = "QNAP 301w";
compatible = "qnap,301w", "qcom,ipq8074";
aliases {
serial0 = &blsp1_uart5;
/*
* Aliases as required by u-boot
* to patch MAC addresses
*/
led-boot = &led_system_red;
led-failsafe = &led_system_red;
led-running = &led_pwr_green;
led-upgrade = &led_system_red;
ethernet0 = &lan4;
ethernet1 = &lan3;
ethernet2 = &lan2;
ethernet3 = &lan1;
ethernet4 = &port_10g_1;
ethernet5 = &port_10g_2;
label-mac-device = &lan4;
};
chosen {
stdout-path = "serial0:115200n8";
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
wps-button {
label = "wps";
gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
reset-button {
label = "reset";
gpios = <&tlmm 67 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led_system_green: led-system-green {
gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
};
led_system_red: led-system-red {
gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
};
led_pwr_green: led-pwr-green {
gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_POWER;
};
led-wifi-green {
gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WLAN;
};
led-lan4-green {
gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <4>;
};
led-lan4-amber {
gpios = <&tlmm 7 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_AMBER>;
function = LED_FUNCTION_LAN;
function-enumerator = <4>;
};
led-lan3-green {
gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <3>;
};
led-lan3-amber {
gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_AMBER>;
function = LED_FUNCTION_LAN;
function-enumerator = <3>;
};
led-lan2-green {
gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <2>;
};
led-lan2-amber {
gpios = <&tlmm 13 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_AMBER>;
function = LED_FUNCTION_LAN;
function-enumerator = <2>;
};
led-lan1-green {
gpios = <&tlmm 14 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <1>;
};
led-lan1-amber {
gpios = <&tlmm 15 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_AMBER>;
function = LED_FUNCTION_LAN;
function-enumerator = <1>;
};
led-10g-1-green {
gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = "10g";
function-enumerator = <1>;
};
led-10g-1-amber {
gpios = <&tlmm 56 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_AMBER>;
function = "10g";
function-enumerator = <1>;
};
led-10g-2-green {
gpios = <&tlmm 51 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = "10g";
function-enumerator = <2>;
};
led-10g-2-amber {
gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_AMBER>;
function = "10g";
function-enumerator = <2>;
};
};
};
&tlmm {
mdio_pins: mdio-state {
mdc-pins {
pins = "gpio68";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mdio-pins {
pins = "gpio69";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
button_pins: button-state {
wps-pins {
pins = "gpio57";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
rst-pins {
pins = "gpio67";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
leds_pins: leds-state {
pins = "gpio1", "gpio3", "gpio4", "gpio6", "gpio7", "gpio8",
"gpio11", "gpio12", "gpio13", "gpio14", "gpio15", "gpio42",
"gpio51", "gpio52", "gpio54", "gpio56";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
&blsp1_uart5 {
status = "okay";
};
&prng {
status = "okay";
};
&ssphy_0 {
status = "okay";
};
&qusb_phy_0 {
status = "okay";
};
&ssphy_1 {
status = "okay";
};
&qusb_phy_1 {
status = "okay";
};
&usb_0 {
status = "okay";
};
&usb_1 {
status = "okay";
};
&qpic_bam {
status = "okay";
};
&blsp1_spi1 { /* BLSP1 QUP1 */
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "okay";
flash@0 {
reg = <0>;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "0:sbl1";
reg = <0x0 0x50000>;
read-only;
};
partition@50000 {
label = "0:mibib";
reg = <0x50000 0x10000>;
read-only;
};
partition@60000 {
label = "0:qsee";
reg = <0x60000 0x180000>;
read-only;
};
partition@1e0000 {
label = "0:devcfg";
reg = <0x1e0000 0x10000>;
read-only;
};
partition@1f0000 {
label = "0:apdp";
reg = <0x1f0000 0x10000>;
read-only;
};
partition@200000 {
label = "0:rpm";
reg = <0x200000 0x40000>;
read-only;
};
partition@240000 {
label = "0:cdt";
reg = <0x240000 0x10000>;
read-only;
};
partition@250000 {
label = "0:appsblenv";
reg = <0x250000 0x20000>;
};
partition@270000 {
label = "0:appsbl";
reg = <0x250000 0x100000>;
read-only;
};
partition@370000 {
label = "0:art";
reg = <0x370000 0x40000>;
read-only;
};
partition@3b0000 {
label = "0:ethphyfw1";
reg = <0x3b0000 0x80000>;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
aqr0_fw: firmware@0 {
reg = <0x0 0x5fc02>;
};
};
};
partition@430000 {
label = "0:ethphyfw2";
reg = <0x430000 0x80000>;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
aqr1_fw: firmware@0 {
reg = <0x0 0x5fc02>;
};
};
};
partition@4b0000 {
label = "reserved";
reg = <0x4b0000 0x350000>;
};
};
};
};
&mdio {
status = "okay";
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
aqr113c_0: ethernet-phy@0 {
compatible ="ethernet-phy-ieee802.3-c45";
reg = <0>;
reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
firmware-name = "marvell/AQR-G4_v5.4.C-AQR_CIG_WF-1945_0x0_ID44778_VER1630.cld";
nvmem-cell-names = "firmware";
nvmem-cells = <&aqr0_fw>;
};
aqr113c_8: ethernet-phy@8 {
compatible ="ethernet-phy-ieee802.3-c45";
reg = <8>;
reset-gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
firmware-name = "marvell/AQR-G4_v5.4.C-AQR_CIG_WF-1945_0x8_ID44776_VER1630.cld";
nvmem-cell-names = "firmware";
nvmem-cells = <&aqr1_fw>;
};
ethernet-phy-package@16 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "qcom,qca8075-package";
reg = <16>;
qcom,package-mode = "qsgmii";
qca8075_16: ethernet-phy@16 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <16>;
};
qca8075_17: ethernet-phy@17 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <17>;
};
qca8075_18: ethernet-phy@18 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <18>;
};
qca8075_19: ethernet-phy@19 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <19>;
};
};
};
&sdhc_1 {
status = "okay";
/* According to the stock dts from the QNAP gpl drop
* the emmc has a problem with the hs400 > hs200 speed switch.
* Therefore remove the mmc-hs400-1_8v property
*/
/delete-property/ mmc-hs400-1_8v;
mmc-hs200-1_8v;
mmc-ddr-1_8v;
vqmmc-supply = <&l11>;
};
&uniphy0 {
status = "okay";
};
&uniphy1 {
status = "okay";
};
&uniphy2 {
status = "okay";
};
&switch {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
ethernet = <&edma>;
phy-mode = "internal";
fixed-link {
speed = <1000>;
full-duplex;
};
};
lan4: port@1 {
reg = <1>;
label = "lan4";
phy-handle = <&qca8075_16>;
phy-mode = "qsgmii";
pcs-handle = <&uniphy0 0>;
};
lan3: port@2 {
reg = <2>;
label = "lan3";
phy-handle = <&qca8075_17>;
phy-mode = "qsgmii";
pcs-handle = <&uniphy0 1>;
};
lan2: port@3 {
reg = <3>;
label = "lan2";
phy-handle = <&qca8075_18>;
phy-mode = "qsgmii";
pcs-handle = <&uniphy0 2>;
};
lan1: port@4 {
reg = <4>;
label = "lan1";
phy-handle = <&qca8075_19>;
phy-mode = "qsgmii";
pcs-handle = <&uniphy0 3>;
};
port_10g_1: port@5 {
reg = <5>;
label = "10g-1";
phy-handle = <&aqr113c_8>;
phy-mode = "usxgmii";
managed = "in-band-status";
pcs-handle = <&uniphy1 0>;
};
port_10g_2: port@6 {
reg = <6>;
label = "10g-2";
phy-handle = <&aqr113c_0>;
phy-mode = "usxgmii";
managed = "in-band-status";
pcs-handle = <&uniphy2 0>;
};
};
};
&edma {
status = "okay";
};
&wifi {
status = "okay";
qcom,ath11k-calibration-variant = "QNAP-301w";
};
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