ARM pseudo subvar: don't substitude [pc, reg]
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6b7ea38969
commit
3b9e823db7
2 changed files with 14 additions and 10 deletions
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@ -290,16 +290,20 @@ static bool subvar(RzParse *p, RzAnalysisFunction *f, RzAnalysisOp *op, char *da
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if (!ripend) {
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ripend = "]";
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}
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if (neg) {
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repl_num -= rz_num_get(NULL, neg + 1);
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} else {
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repl_num += rz_num_get(NULL, rip);
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const char *maybe_num = neg ? neg + 1 : rip;
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maybe_num = rz_str_trim_head_ro(maybe_num);
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if (rz_is_valid_input_num_value(NULL, maybe_num)) {
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if (neg) {
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repl_num -= rz_num_get(NULL, maybe_num);
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} else {
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repl_num += rz_num_get(NULL, maybe_num);
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}
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rip -= 3;
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*rip = 0;
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tstr_new = rz_str_newf("%s0x%08" PFMT64x "%s", tstr, repl_num, ripend);
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free(tstr);
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tstr = tstr_new;
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}
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rip -= 3;
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*rip = 0;
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tstr_new = rz_str_newf("%s0x%08" PFMT64x "%s", tstr, repl_num, ripend);
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free(tstr);
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tstr = tstr_new;
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}
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}
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@ -11,7 +11,7 @@ pdr~case
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EOF
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EXPECT=<<EOF
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| 0x00000008 bhs case.0xa.0
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| 0x0000000a switch.0x000 tbb [0x00000010] ; switch table (6 cases) at 0xe
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| 0x0000000a switch.0x000 tbb [pc, r0] ; switch table (6 cases) at 0xe
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| 0x00000014 case.0xa.2: ldr r0, [0x00000050] ; [0x50:4]=0x200001a1
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| 0x0000001a beq case.0xa.0
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| 0x0000002a case.0xa.3: movs r0, 0
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