[RzIL] Remove vector-oplists in favor of seq
The root type of a lifted op is now simply a single RzILOpEffect, which can be for example a chain of seq ops. This is in line with what BAP uses. For convenient creation of sequences, `rz_il_op_new_seqn(ut32 n, ...)` is a drop-in replacement for `rz_il_make_oplist(ut32 n, ...)`.
This commit is contained in:
Florian Märkl
parent
20ed5b924f
commit
6a09385746
14 changed files with 179 additions and 148 deletions
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@ -54,8 +54,7 @@ RZ_API bool rz_analysis_op_fini(RzAnalysisOp *op) {
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op->switch_op = NULL;
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RZ_FREE(op->mnemonic);
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if (op->rzil_op) {
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// TODO free root_node once it is implemented
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rz_pvector_free(op->rzil_op->ops);
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rz_il_op_effect_free(op->rzil_op->op);
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RZ_FREE(op->rzil_op);
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}
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return true;
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@ -77,49 +77,45 @@ ut64 parse_label_id(char *lbl_name) {
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return addr;
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}
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RzPVector *bf_right_arrow(RzILVM *vm, ut64 id) {
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RzILOpEffect *bf_right_arrow(RzILVM *vm, ut64 id) {
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// (set ptr (+ (val ptr) (int 1)))
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RzILOpBitVector *add = rz_il_op_new_add(bf_il_ptr(), bf_il_one(BF_ADDR_SIZE));
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return rz_il_make_oplist(1, bf_il_set_ptr(add));
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return bf_il_set_ptr(add);
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}
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RzPVector *bf_left_arrow(RzILVM *vm, ut64 id) {
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RzILOpEffect *bf_left_arrow(RzILVM *vm, ut64 id) {
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// (set ptr (- (val ptr) (int 1)))
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RzILOpBitVector *sub = rz_il_op_new_sub(bf_il_ptr(), bf_il_one(BF_ADDR_SIZE));
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return rz_il_make_oplist(1, bf_il_set_ptr(sub));
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return bf_il_set_ptr(sub);
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}
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RzPVector *bf_inc(RzILVM *vm, ut64 id) {
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RzILOpEffect *bf_inc(RzILVM *vm, ut64 id) {
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// (store mem (var ptr) (+ (load (var ptr)) (int 1)))
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// mem == 0 because is the only mem in bf
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RzILOpBitVector *load = rz_il_op_new_load(0, bf_il_ptr());
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RzILOpBitVector *add = rz_il_op_new_add(load, bf_il_one(BF_BYTE_SIZE));
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RzILOpEffect *store = rz_il_op_new_store(0, bf_il_ptr(), add);
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return rz_il_make_oplist(1, store);
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return rz_il_op_new_store(0, bf_il_ptr(), add);
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}
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RzPVector *bf_dec(RzILVM *vm, ut64 id) {
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RzILOpEffect *bf_dec(RzILVM *vm, ut64 id) {
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// (store mem (var ptr) (- (load (var ptr)) (int 1)))
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// mem == 0 because is the only mem in bf
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RzILOpBitVector *load = rz_il_op_new_load(0, bf_il_ptr());
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RzILOpBitVector *sub = rz_il_op_new_sub(load, bf_il_one(BF_BYTE_SIZE));
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RzILOpEffect *store = rz_il_op_new_store(0, bf_il_ptr(), sub);
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return rz_il_make_oplist(1, store);
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return rz_il_op_new_store(0, bf_il_ptr(), sub);
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}
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RzPVector *bf_out(RzILVM *vm, ut64 id) {
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RzILOpEffect *bf_out(RzILVM *vm, ut64 id) {
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// (goto write)
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RzILOpEffect *goto_ = rz_il_op_new_goto("write");
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return rz_il_make_oplist(1, goto_);
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return rz_il_op_new_goto("write");
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}
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RzPVector *bf_in(RzILVM *vm, ut64 id) {
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RzILOpEffect *bf_in(RzILVM *vm, ut64 id) {
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// (goto hook_read)
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RzILOpEffect *goto_ = rz_il_op_new_goto("read");
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return rz_il_make_oplist(1, goto_);
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return rz_il_op_new_goto("read");
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}
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RzPVector *bf_llimit(RzILVM *vm, BfContext *ctx, ut64 id, ut64 addr) {
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RzILOpEffect *bf_llimit(RzILVM *vm, BfContext *ctx, ut64 id, ut64 addr) {
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// (perform (branch (load mem (var ptr))
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// (do nothing)
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// (goto ]))
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@ -159,13 +155,10 @@ RzPVector *bf_llimit(RzILVM *vm, BfContext *ctx, ut64 id, ut64 addr) {
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RzILOpEffect *goto_ = rz_il_op_new_goto(dst_label->label_id);
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// branch if (load mem (var ptr)) is false then goto ]
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RzILOpEffect *branch = rz_il_op_new_branch(cond, NULL, goto_);
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// perform
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return rz_il_make_oplist(1, branch);
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return rz_il_op_new_branch(cond, NULL, goto_);
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}
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RzPVector *bf_rlimit(RzILVM *vm, BfContext *ctx, ut64 id, ut64 addr) {
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RzILOpEffect *bf_rlimit(RzILVM *vm, BfContext *ctx, ut64 id, ut64 addr) {
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// (perform (branch (load mem (var ptr))
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// (goto [)
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// (do nothing))
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@ -202,7 +195,7 @@ RzPVector *bf_rlimit(RzILVM *vm, BfContext *ctx, ut64 id, ut64 addr) {
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RzILOpEffect *branch = rz_il_op_new_branch(cond, goto_, NULL);
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free(to_free);
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return rz_il_make_oplist(1, branch);
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return branch;
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}
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static bool bf_specific_init(RzAnalysisRzil *rzil) {
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@ -320,7 +313,7 @@ static int bf_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *b
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BfContext *ctx = analysis->rzil->user;
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RzILVM *vm = analysis->rzil->vm;
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RzPVector *oplist = NULL;
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RzILOpEffect *ilop = NULL;
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op->rzil_op = RZ_NEW0(RzAnalysisRzilOp);
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if (!op->rzil_op) {
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RZ_LOG_ERROR("Fail to init rzil op\n");
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@ -330,7 +323,7 @@ static int bf_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *b
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switch (buf[0]) {
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case '[':
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oplist = bf_llimit(vm, ctx, op->id, addr);
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ilop = bf_llimit(vm, ctx, op->id, addr);
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op->type = RZ_ANALYSIS_OP_TYPE_CJMP;
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op->fail = addr + 1;
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buf = rz_mem_dup((void *)buf, len);
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@ -377,31 +370,31 @@ static int bf_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *b
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free((ut8 *)buf);
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break;
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case ']':
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oplist = bf_rlimit(vm, ctx, op->id, addr);
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ilop = bf_rlimit(vm, ctx, op->id, addr);
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op->type = RZ_ANALYSIS_OP_TYPE_UJMP;
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break;
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case '>':
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op->type = RZ_ANALYSIS_OP_TYPE_ADD;
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oplist = bf_right_arrow(vm, op->id);
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ilop = bf_right_arrow(vm, op->id);
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break;
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case '<':
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op->type = RZ_ANALYSIS_OP_TYPE_SUB;
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oplist = bf_left_arrow(vm, op->id);
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ilop = bf_left_arrow(vm, op->id);
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break;
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case '+':
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op->type = RZ_ANALYSIS_OP_TYPE_ADD;
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oplist = bf_inc(vm, op->id);
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ilop = bf_inc(vm, op->id);
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break;
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case '-':
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op->type = RZ_ANALYSIS_OP_TYPE_SUB;
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oplist = bf_dec(vm, op->id);
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ilop = bf_dec(vm, op->id);
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break;
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case '.':
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oplist = bf_out(vm, op->id);
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ilop = bf_out(vm, op->id);
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op->type = RZ_ANALYSIS_OP_TYPE_STORE;
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break;
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case ',':
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oplist = bf_in(vm, op->id);
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ilop = bf_in(vm, op->id);
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op->type = RZ_ANALYSIS_OP_TYPE_LOAD;
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break;
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case 0x00:
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@ -410,10 +403,11 @@ static int bf_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *b
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break;
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default:
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op->type = RZ_ANALYSIS_OP_TYPE_NOP;
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ilop = rz_il_op_new_nop();
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break;
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}
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if (oplist) {
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op->rzil_op->ops = oplist;
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if (ilop) {
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op->rzil_op->op = ilop;
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}
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ctx->op_count++;
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return op->size;
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@ -636,8 +636,6 @@ RZ_IPI void rz_core_analysis_rzil_vm_status(RzCore *core, const char *var_name,
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// step a list of ct_opcode at a given address
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RZ_IPI void rz_core_rzil_step(RzCore *core) {
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RzPVector *oplist;
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if (!core->analysis || !core->analysis->rzil) {
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RZ_LOG_ERROR("RzIL: Run 'aezi' first to initialize the VM\n");
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return;
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@ -662,10 +660,10 @@ RZ_IPI void rz_core_rzil_step(RzCore *core) {
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// analysis current data to trigger rzil_set_op_code
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(void)rz_io_read_at_mapped(core->io, addr, code, sizeof(code));
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int size = rz_analysis_op(analysis, &op, addr, code, sizeof(code), RZ_ANALYSIS_OP_MASK_ESIL | RZ_ANALYSIS_OP_MASK_HINT);
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oplist = op.rzil_op ? op.rzil_op->ops : NULL;
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RzILOpEffect *ilop = op.rzil_op ? op.rzil_op->op : NULL;
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if (oplist) {
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rz_il_vm_list_step(vm, oplist, size > 0 ? size : 1);
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if (ilop) {
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rz_il_vm_list_step(vm, ilop, size > 0 ? size : 1);
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} else {
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RZ_LOG_ERROR("RzIL: invalid instruction detected or reach the end of code at address 0x%08" PFMT64x "\n", addr);
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}
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@ -1052,9 +1052,9 @@ static void core_analysis_bytes(RzCore *core, const ut8 *buf, int len, int nops,
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pj_ks(pj, "esil", jesil);
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}
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if (op.rzil_op) {
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if (op.rzil_op->ops) {
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if (op.rzil_op->op) {
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pj_k(pj, "rzil");
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rz_il_oplist_json(op.rzil_op->ops, pj);
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rz_il_op_effect_json(op.rzil_op->op, pj);
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} else {
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pj_knull(pj, "rzil");
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}
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@ -1235,15 +1235,11 @@ static void core_analysis_bytes(RzCore *core, const ut8 *buf, int len, int nops,
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} else if (RZ_STR_ISNOTEMPTY(esilstr)) {
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printline("esil", "%s\n", esilstr);
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}
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if (op.rzil_op) {
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if (op.rzil_op->ops) {
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RzStrBuf *sbil = rz_strbuf_new("");
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rz_il_oplist_stringify(op.rzil_op->ops, sbil);
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printline("rzil", "%s\n", rz_strbuf_get(sbil));
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rz_strbuf_free(sbil);
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} else {
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printline_noarg("rzil", "[]");
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}
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if (op.rzil_op && op.rzil_op->op) {
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RzStrBuf *sbil = rz_strbuf_new("");
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rz_il_op_effect_stringify(op.rzil_op->op, sbil);
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printline("rzil", "%s\n", rz_strbuf_get(sbil));
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rz_strbuf_free(sbil);
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}
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if (hint && hint->jump != UT64_MAX) {
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op.jump = hint->jump;
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@ -665,45 +665,6 @@ RZ_API void rz_il_op_effect_json(RZ_NONNULL RzILOpEffect *op, RZ_NONNULL PJ *pj)
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il_op_effect_resolve(op, NULL, pj);
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}
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/**
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* Generates the string representation of the IL statements
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* \param op_list RzPVector*, array of IL statements
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* \param sb RzStrBuf*, a pointer to the string buffer
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*/
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RZ_API void rz_il_oplist_stringify(RZ_NONNULL RzPVector *op_list, RZ_NONNULL RzStrBuf *sb) {
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rz_return_if_fail(op_list && sb);
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ut32 i = 0;
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void **iter;
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rz_strbuf_append(sb, "[");
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rz_pvector_foreach (op_list, iter) {
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RzILOpEffect *ilop = *iter;
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if (i > 0) {
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rz_strbuf_append(sb, ", ");
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}
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rz_il_op_effect_stringify(ilop, sb);
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i++;
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}
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rz_strbuf_append(sb, "]");
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}
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/**
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* Generates the JSON representation of the IL statements
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* \param code RzPVector*, array of IL statements
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* \param pj PJ*, a pointer to the JSON buffer
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*/
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RZ_API void rz_il_oplist_json(RZ_NONNULL RzPVector *op_list, RZ_NONNULL PJ *pj) {
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rz_return_if_fail(op_list && pj);
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pj_a(pj);
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void **iter;
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rz_pvector_foreach (op_list, iter) {
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RzILOpEffect *ilop = *iter;
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rz_il_op_effect_json(ilop, pj);
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}
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pj_end(pj);
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}
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RZ_API void rz_il_event_stringify(RZ_NONNULL RzILEvent *evt, RZ_NONNULL RzStrBuf *sb) {
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rz_return_if_fail(evt && sb);
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char *tmp0 = NULL, *tmp1 = NULL, *tmp2 = NULL;
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@ -560,6 +560,64 @@ RZ_API RZ_OWN RzILOpEffect *rz_il_op_new_seq(RZ_NONNULL RzILOpEffect *x, RZ_NONN
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return ret;
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}
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/**
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* Chain \p n opcodes given as varargs in sequence using seq if necessary
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*
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* It works exactly like this seq helper from BAP:
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* let rec seq = function
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* | [] -> CT.perform Theory.Effect.Sort.bot
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* | [x] -> x
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* | x :: xs -> CT.seq x @@ seq xs
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*
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* \param n number of total opcodes given
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* \param ... \p num RzILOpEffect * ops to be executed in sequence
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*/
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RZ_API RZ_OWN RzILOpEffect *rz_il_op_new_seqn(ut32 n, ...) {
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if (!n) {
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return rz_il_op_new_nop();
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}
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RzILOpEffect *root = NULL;
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RzILOpEffect *prev_seq = NULL;
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va_list args;
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va_start(args, n);
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for (ut32 i = 0; i < n; ++i) {
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RzILOpEffect *cur_op = va_arg(args, RzILOpEffect *);
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if (i == n - 1) {
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// last one
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if (prev_seq) {
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prev_seq->op.seq->y = cur_op;
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} else {
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// n == 1, no need for seq at all
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root = cur_op;
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}
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break;
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}
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RzILOpEffect *seq = RZ_NEW0(RzILOpEffect);
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if (!seq) {
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break;
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}
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seq->op.seq = RZ_NEW0(RzILOpArgsSeq);
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if (!seq->op.seq) {
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free(seq);
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break;
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}
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seq->code = RZIL_OP_SEQ;
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seq->op.seq->x = cur_op;
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if (prev_seq) {
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// not the first one
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// We let the seq recurse in the second op because that
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// can enable tail call elimination in the evaluation.
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prev_seq->op.seq->y = seq;
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} else {
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// first one
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root = seq;
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}
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prev_seq = seq;
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}
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va_end(args);
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return root;
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}
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/**
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* \brief op structure for `blk` (label -> data eff -> ctrl eff -> unit eff)
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*
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@ -386,27 +386,6 @@ RZ_API RZ_BORROW RzILEffectLabel *rz_il_vm_update_label(RZ_NONNULL RzILVM *vm, R
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return lbl;
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}
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/**
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* Make a core theory opcode vector
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* \param num int, number of total opcodes
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* \param ... op RzILOp, op will be pushed to vector one by one
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* \return oplist RzPVector*, pointer to the opcode
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*/
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RZ_API RZ_OWN RzPVector *rz_il_make_oplist(ut32 num, ...) {
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va_list args;
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RzILOpEffect *cur_op;
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RzPVector *oplist = rz_pvector_new((RzPVectorFree)rz_il_op_effect_free);
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va_start(args, num);
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for (ut32 i = 0; i < num; ++i) {
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cur_op = va_arg(args, RzILOpEffect *);
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rz_pvector_push(oplist, cur_op);
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}
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va_end(args);
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return oplist;
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}
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static void *eval_pure(RZ_NONNULL RzILVM *vm, RZ_NONNULL RzILOpPure *op, RZ_NONNULL RzILPureType *type) {
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rz_return_val_if_fail(vm && op && type, NULL);
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RzILOpPureHandler handler = vm->op_handler_pure_table[op->code];
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@ -400,20 +400,12 @@ RZ_API void rz_il_vm_event_add(RzILVM *vm, RzILEvent *evt) {
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* \param op_list, a list of op roots.
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* \param op_size, how much the pc value has to increate of.
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*/
|
||||
RZ_API bool rz_il_vm_list_step(RzILVM *vm, RzPVector *op_list, ut32 op_size) {
|
||||
rz_return_val_if_fail(vm && op_list, false);
|
||||
RZ_API bool rz_il_vm_list_step(RzILVM *vm, RzILOpEffect *op, ut32 op_size) {
|
||||
rz_return_val_if_fail(vm && op, false);
|
||||
|
||||
rz_list_purge(vm->events);
|
||||
|
||||
bool succ = true;
|
||||
void **iter;
|
||||
rz_pvector_foreach (op_list, iter) {
|
||||
RzILOpEffect *root = *iter;
|
||||
if (!rz_il_evaluate_effect(vm, root)) {
|
||||
succ = false;
|
||||
break;
|
||||
}
|
||||
}
|
||||
bool succ = rz_il_evaluate_effect(vm, op);
|
||||
|
||||
RzBitVector *step = rz_bv_new_from_ut64(vm->pc->len, op_size);
|
||||
RzBitVector *next_pc = rz_bv_add(vm->pc, step, NULL);
|
||||
|
|
|
|||
|
|
@ -807,9 +807,8 @@ typedef enum rz_analysis_data_type_t {
|
|||
RZ_ANALYSIS_DATATYPE_FLOAT,
|
||||
} RzAnalysisDataType;
|
||||
|
||||
// For switchting to AST-like approach in the future
|
||||
typedef struct rz_analysis_rzil_op_t {
|
||||
RzPVector *ops;
|
||||
RzILOpEffect *op;
|
||||
} RzAnalysisRzilOp;
|
||||
|
||||
typedef struct rz_analysis_op_t {
|
||||
|
|
|
|||
|
|
@ -524,6 +524,7 @@ RZ_API RZ_OWN RzILOpEffect *rz_il_op_new_let(RZ_NONNULL const char *var, RZ_NONN
|
|||
RZ_API RZ_OWN RzILOpEffect *rz_il_op_new_jmp(RZ_NONNULL RzILOpBitVector *dst);
|
||||
RZ_API RZ_OWN RzILOpEffect *rz_il_op_new_goto(RZ_NONNULL const char *label);
|
||||
RZ_API RZ_OWN RzILOpEffect *rz_il_op_new_seq(RZ_NONNULL RzILOpEffect *x, RZ_NONNULL RzILOpEffect *y);
|
||||
RZ_API RZ_OWN RzILOpEffect *rz_il_op_new_seqn(ut32 n, ...);
|
||||
RZ_API RZ_OWN RzILOpEffect *rz_il_op_new_blk(RZ_NONNULL RzILOpEffect *data_effect, RZ_NONNULL RzILOpEffect *ctrl_effect);
|
||||
RZ_API RZ_OWN RzILOpEffect *rz_il_op_new_repeat(RZ_NONNULL RzILOpBool *condition, RZ_NONNULL RzILOpEffect *data_effect);
|
||||
RZ_API RZ_OWN RzILOpEffect *rz_il_op_new_branch(RZ_NONNULL RzILOpBool *condition, RZ_NULLABLE RzILOpEffect *true_effect, RZ_NULLABLE RzILOpEffect *false_effect);
|
||||
|
|
|
|||
|
|
@ -94,17 +94,11 @@ RZ_API RZ_BORROW RzILVal *rz_il_vm_fortify_bool(RZ_NONNULL RzILVM *vm, bool val)
|
|||
RZ_API void rz_il_vm_add_reg(RZ_NONNULL RzILVM *vm, RZ_NONNULL const char *name, ut32 length);
|
||||
RZ_API void rz_il_vm_add_bit_reg(RZ_NONNULL RzILVM *vm, RZ_NONNULL const char *name, bool value);
|
||||
|
||||
// VM store and load core theory opcodes
|
||||
RZ_API RZ_OWN RzPVector *rz_il_make_oplist(ut32 num, ...);
|
||||
#define rz_il_make_nop_list() rz_il_make_oplist(0, NULL)
|
||||
|
||||
RZ_API void rz_il_op_pure_stringify(RZ_NONNULL RzILOpPure *op, RZ_NONNULL RzStrBuf *sb);
|
||||
RZ_API void rz_il_op_effect_stringify(RZ_NONNULL RzILOpEffect *op, RZ_NONNULL RzStrBuf *sb);
|
||||
RZ_API void rz_il_oplist_stringify(RZ_NONNULL RzPVector *oplist, RZ_NONNULL RzStrBuf *sb);
|
||||
|
||||
RZ_API void rz_il_op_pure_json(RZ_NONNULL RzILOpPure *op, RZ_NONNULL PJ *pj);
|
||||
RZ_API void rz_il_op_effect_json(RZ_NONNULL RzILOpEffect *op, RZ_NONNULL PJ *pj);
|
||||
RZ_API void rz_il_oplist_json(RZ_NONNULL RzPVector *oplist, RZ_NONNULL PJ *pj);
|
||||
|
||||
RZ_API void rz_il_event_stringify(RZ_NONNULL RzILEvent *evt, RZ_NONNULL RzStrBuf *sb);
|
||||
RZ_API void rz_il_event_json(RZ_NONNULL RzILEvent *evt, RZ_NONNULL PJ *pj);
|
||||
|
|
|
|||
|
|
@ -17,7 +17,7 @@ RZ_API bool rz_il_vm_init(RzILVM *vm, ut64 start_addr, ut32 addr_size, bool big_
|
|||
RZ_API void rz_il_vm_fini(RzILVM *vm);
|
||||
RZ_API void rz_il_vm_add_mem(RzILVM *vm, RzILMemIndex index, RZ_OWN RzILMem *mem);
|
||||
RZ_API RzILMem *rz_il_vm_get_mem(RzILVM *vm, RzILMemIndex index);
|
||||
RZ_API bool rz_il_vm_list_step(RzILVM *vm, RzPVector *op_list, ut32 op_size);
|
||||
RZ_API bool rz_il_vm_list_step(RzILVM *vm, RzILOpEffect *op, ut32 op_size);
|
||||
|
||||
// VM Event operations
|
||||
RZ_API void rz_il_vm_event_add(RzILVM *vm, RzILEvent *evt);
|
||||
|
|
|
|||
|
|
@ -78,29 +78,29 @@ aoj @ 0x6a ~{.rzil}
|
|||
EOF
|
||||
EXPECT=<<EOF
|
||||
opcode: inc [ptr]
|
||||
rzil: [store(mem:0, key:var(v:ptr), value:add(x:load(mem:0, key:var(v:ptr)), y:bitv(bits:0x01, len:8)))]
|
||||
[{"opcode":"store","mem":0,"key":{"opcode":"var","value":"ptr"},"value":{"opcode":"add","x":{"opcode":"load","mem":0,"key":{"opcode":"var","value":"ptr"}},"y":{"opcode":"bitv","bits":"0x01","len":8}}}]
|
||||
rzil: store(mem:0, key:var(v:ptr), value:add(x:load(mem:0, key:var(v:ptr)), y:bitv(bits:0x01, len:8)))
|
||||
{"opcode":"store","mem":0,"key":{"opcode":"var","value":"ptr"},"value":{"opcode":"add","x":{"opcode":"load","mem":0,"key":{"opcode":"var","value":"ptr"}},"y":{"opcode":"bitv","bits":"0x01","len":8}}}
|
||||
opcode: while [ptr]
|
||||
rzil: [branch(condition:inv(x:is_zero(bv:load(mem:0, key:var(v:ptr)))), true_eff:nop(), false_eff:goto(lbl:]8))]
|
||||
[{"opcode":"branch","condition":{"opcode":"inv","x":{"opcode":"is_zero","bv":{"opcode":"load","mem":0,"key":{"opcode":"var","value":"ptr"}}}},"true_eff":{"opcode":"nop"},"false_eff":{"opcode":"goto","label":"]8"}}]
|
||||
rzil: branch(condition:inv(x:is_zero(bv:load(mem:0, key:var(v:ptr)))), true_eff:nop(), false_eff:goto(lbl:]8))
|
||||
{"opcode":"branch","condition":{"opcode":"inv","x":{"opcode":"is_zero","bv":{"opcode":"load","mem":0,"key":{"opcode":"var","value":"ptr"}}}},"true_eff":{"opcode":"nop"},"false_eff":{"opcode":"goto","label":"]8"}}
|
||||
opcode: inc ptr
|
||||
rzil: [set(v:ptr, x:add(x:var(v:ptr), y:bitv(bits:0x0000000000000001, len:64)))]
|
||||
[{"opcode":"set","dst":"ptr","src":{"opcode":"add","x":{"opcode":"var","value":"ptr"},"y":{"opcode":"bitv","bits":"0x0000000000000001","len":64}}}]
|
||||
rzil: set(v:ptr, x:add(x:var(v:ptr), y:bitv(bits:0x0000000000000001, len:64)))
|
||||
{"opcode":"set","dst":"ptr","src":{"opcode":"add","x":{"opcode":"var","value":"ptr"},"y":{"opcode":"bitv","bits":"0x0000000000000001","len":64}}}
|
||||
opcode: dec ptr
|
||||
rzil: [set(v:ptr, x:sub(x:var(v:ptr), y:bitv(bits:0x0000000000000001, len:64)))]
|
||||
[{"opcode":"set","dst":"ptr","src":{"opcode":"sub","x":{"opcode":"var","value":"ptr"},"y":{"opcode":"bitv","bits":"0x0000000000000001","len":64}}}]
|
||||
rzil: set(v:ptr, x:sub(x:var(v:ptr), y:bitv(bits:0x0000000000000001, len:64)))
|
||||
{"opcode":"set","dst":"ptr","src":{"opcode":"sub","x":{"opcode":"var","value":"ptr"},"y":{"opcode":"bitv","bits":"0x0000000000000001","len":64}}}
|
||||
opcode: dec [ptr]
|
||||
rzil: [store(mem:0, key:var(v:ptr), value:sub(x:load(mem:0, key:var(v:ptr)), y:bitv(bits:0x01, len:8)))]
|
||||
[{"opcode":"store","mem":0,"key":{"opcode":"var","value":"ptr"},"value":{"opcode":"sub","x":{"opcode":"load","mem":0,"key":{"opcode":"var","value":"ptr"}},"y":{"opcode":"bitv","bits":"0x01","len":8}}}]
|
||||
rzil: store(mem:0, key:var(v:ptr), value:sub(x:load(mem:0, key:var(v:ptr)), y:bitv(bits:0x01, len:8)))
|
||||
{"opcode":"store","mem":0,"key":{"opcode":"var","value":"ptr"},"value":{"opcode":"sub","x":{"opcode":"load","mem":0,"key":{"opcode":"var","value":"ptr"}},"y":{"opcode":"bitv","bits":"0x01","len":8}}}
|
||||
opcode: loop
|
||||
rzil: [branch(condition:inv(x:is_zero(bv:load(mem:0, key:var(v:ptr)))), true_eff:goto(lbl:[14), false_eff:nop())]
|
||||
[{"opcode":"branch","condition":{"opcode":"inv","x":{"opcode":"is_zero","bv":{"opcode":"load","mem":0,"key":{"opcode":"var","value":"ptr"}}}},"true_eff":{"opcode":"goto","label":"[14"},"false_eff":{"opcode":"nop"}}]
|
||||
rzil: branch(condition:inv(x:is_zero(bv:load(mem:0, key:var(v:ptr)))), true_eff:goto(lbl:[14), false_eff:nop())
|
||||
{"opcode":"branch","condition":{"opcode":"inv","x":{"opcode":"is_zero","bv":{"opcode":"load","mem":0,"key":{"opcode":"var","value":"ptr"}}}},"true_eff":{"opcode":"goto","label":"[14"},"false_eff":{"opcode":"nop"}}
|
||||
opcode: out [ptr]
|
||||
rzil: [goto(lbl:write)]
|
||||
[{"opcode":"goto","label":"write"}]
|
||||
rzil: goto(lbl:write)
|
||||
{"opcode":"goto","label":"write"}
|
||||
opcode: nop
|
||||
rzil: []
|
||||
null
|
||||
rzil: nop()
|
||||
{"opcode":"nop"}
|
||||
EOF
|
||||
RUN
|
||||
|
||||
|
|
|
|||
|
|
@ -234,6 +234,65 @@ static bool test_rzil_mem_storew() {
|
|||
mu_end;
|
||||
}
|
||||
|
||||
static bool test_rzil_seqn() {
|
||||
// n = 0 ==> just a nop
|
||||
RzILOpEffect *s = rz_il_op_new_seqn(0);
|
||||
mu_assert_notnull(s, "seqn 0");
|
||||
mu_assert_eq(s->code, RZIL_OP_NOP, "seqn 0 nop");
|
||||
rz_il_op_effect_free(s);
|
||||
|
||||
// n = 1 ==> just the op
|
||||
RzILOpEffect *e0 = rz_il_op_new_goto("beach");
|
||||
s = rz_il_op_new_seqn(1, e0);
|
||||
mu_assert_notnull(s, "seqn 1");
|
||||
mu_assert_ptreq(s, e0, "seqn 1 op");
|
||||
rz_il_op_effect_free(s);
|
||||
|
||||
// n = 2 ==> single seq
|
||||
// (seq e0 e1)
|
||||
e0 = rz_il_op_new_goto("beach");
|
||||
RzILOpEffect *e1 = rz_il_op_new_goto("beach2");
|
||||
s = rz_il_op_new_seqn(2, e0, e1);
|
||||
mu_assert_notnull(s, "seqn 2");
|
||||
mu_assert_eq(s->code, RZIL_OP_SEQ, "seqn 2 seq");
|
||||
mu_assert_ptreq(s->op.seq->x, e0, "seqn 2 first");
|
||||
mu_assert_ptreq(s->op.seq->y, e1, "seqn 2 second");
|
||||
rz_il_op_effect_free(s);
|
||||
|
||||
// n = 3 ==> nested seq with recursion in the second op:
|
||||
// (seq e0 (seq e1 e2))
|
||||
e0 = rz_il_op_new_goto("beach");
|
||||
e1 = rz_il_op_new_goto("beach2");
|
||||
RzILOpEffect *e2 = rz_il_op_new_goto("beach3");
|
||||
s = rz_il_op_new_seqn(3, e0, e1, e2);
|
||||
mu_assert_notnull(s, "seqn 3");
|
||||
mu_assert_eq(s->code, RZIL_OP_SEQ, "seqn 3 seq");
|
||||
mu_assert_ptreq(s->op.seq->x, e0, "seqn 3 first");
|
||||
mu_assert_eq(s->op.seq->y->code, RZIL_OP_SEQ, "seqn 3 second seq");
|
||||
mu_assert_ptreq(s->op.seq->y->op.seq->x, e1, "seqn 3 second");
|
||||
mu_assert_ptreq(s->op.seq->y->op.seq->y, e2, "seqn 3 third");
|
||||
rz_il_op_effect_free(s);
|
||||
|
||||
// n = 4 ==> nested seq with recursion in the second op and no confusion:
|
||||
// (seq e0 (seq e1 (seq e2 e3)))
|
||||
e0 = rz_il_op_new_goto("beach");
|
||||
e1 = rz_il_op_new_goto("beach2");
|
||||
e2 = rz_il_op_new_goto("beach3");
|
||||
RzILOpEffect *e3 = rz_il_op_new_goto("beach3");
|
||||
s = rz_il_op_new_seqn(4, e0, e1, e2, e3);
|
||||
mu_assert_notnull(s, "seqn 4");
|
||||
mu_assert_eq(s->code, RZIL_OP_SEQ, "seqn 4 seq");
|
||||
mu_assert_ptreq(s->op.seq->x, e0, "seqn 4 first");
|
||||
mu_assert_eq(s->op.seq->y->code, RZIL_OP_SEQ, "seqn 4 second seq");
|
||||
mu_assert_ptreq(s->op.seq->y->op.seq->x, e1, "seqn 4 second");
|
||||
mu_assert_eq(s->op.seq->y->op.seq->y->code, RZIL_OP_SEQ, "seqn 4 third seq");
|
||||
mu_assert_ptreq(s->op.seq->y->op.seq->y->op.seq->x, e2, "seqn 4 third");
|
||||
mu_assert_ptreq(s->op.seq->y->op.seq->y->op.seq->y, e3, "seqn 4 fourth");
|
||||
rz_il_op_effect_free(s);
|
||||
|
||||
mu_end;
|
||||
}
|
||||
|
||||
bool all_tests() {
|
||||
mu_run_test(test_rzil_bool_init);
|
||||
mu_run_test(test_rzil_bool_logic);
|
||||
|
|
@ -241,6 +300,7 @@ bool all_tests() {
|
|||
mu_run_test(test_rzil_mem_store);
|
||||
mu_run_test(test_rzil_mem_loadw);
|
||||
mu_run_test(test_rzil_mem_storew);
|
||||
mu_run_test(test_rzil_seqn);
|
||||
return tests_passed != tests_run;
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue