portugalfuturista/rizin
2
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

librz/reg: handle 1 bit fields the same on BE and LE (#6496)

Browse source 
Co-authored-by: Anton Kochkov <anton.kochkov@gmail.com>
This commit is contained in:
NOT XVilka 2026-06-11 16:10:32 +08:00 committed by GitHub
parent 423576676b
commit 86c8620662
No known key found for this signature in database
GPG key ID: B5690EEEBB952194
1 changed files with 11 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

11
librz/reg/rvalue.c
View file

@ -19,6 +19,17 @@ RZ_API RZ_OWN RzBitVector *rz_reg_get_bv(RZ_NONNULL RzReg *reg, RZ_NONNULL RzReg
return rz_bv_new_zero(item->size);
}
RzRegSet *regset = &reg->regset[item->arena];
if (item->size == 1 && (item->offset % 8)) {
// a single-bit, non-byte-aligned register (e.g. a status-word flag) is
// stored at a fixed physical bit position, independent of endianness.
RzBitVector *bv = rz_bv_new(1);
if (!bv) {
return NULL;
}
bool bit = (regset->arena->bytes[item->offset / 8] >> (item->offset % 8)) & 1;
rz_bv_set(bv, 0, bit);
return bv;
}
if (reg->big_endian) {
return rz_bv_new_from_bytes_be(regset->arena->bytes, item->offset, item->size);
} else {