diff --git a/.gitignore b/.gitignore index 1a15aab68b..3fcb8c32fc 100644 --- a/.gitignore +++ b/.gitignore @@ -119,4 +119,4 @@ doc/doxygen/html __pycache__ # Dynamic docker building folder to minimize docker context .docker_alpine -.ccls-cache/ +.ccls-cache/ \ No newline at end of file diff --git a/libr/core/cmd_debug.c b/libr/core/cmd_debug.c index 6bf687aab6..48155936dd 100644 --- a/libr/core/cmd_debug.c +++ b/libr/core/cmd_debug.c @@ -329,9 +329,8 @@ static const char *help_msg_dr[] = { "drf", "", "Show fpu registers (80 bit long double)", "dri", "", "Show inverse registers dump (sorted by value)", "drl", "[j]", "List all register names", - "drm", "", "Show multimedia packed registers", - "drm", " mmx0 0 32 = 12", "Set the first 32 bit word of the mmx reg to 12", - "drn", " ", "Get regname for pc,sp,bp,a0-3,zf,cf,of,sg", + "drm", "[?]", "Show multimedia packed registers", + // "drm", " xmm0 0 32 = 12", "Set the first 32 bit word of the xmm0 reg to 12", // Do not advertise - broken "dro", "", "Show previous (old) values of registers", "drp", "", "Display current register profile", "drp", "[?] ", "Load register metadata file", @@ -395,6 +394,18 @@ static const char *help_msg_drx[] = { NULL }; + +static const char *help_msg_drm[] = { + "Usage: drm", " [reg] [idx] [wordsize] [= value]", "Show multimedia packed registers", + "drm", " xmm0", "Show all packings of xmm0", + "drm", " xmm0 0 32 = 12", "Set the first 32 bit word of the xmm0 reg to 12", //broken + "drmb", " ", "Show register as bytes", + "drmw", " ", "Show register as words", + "drmd", " ", "Show register as doublewords", + "drmq", " ", "Show register as quadwords", + NULL +}; + static const char *help_msg_ds[] = { "Usage: ds", "", "Step commands", "ds", "", "Step one instruction", @@ -2531,44 +2542,101 @@ static void cmd_debug_reg(RCore *core, const char *str) { break; case 'm': // "drm" if (str[1]=='?') { - eprintf ("usage: drm [reg] [idx] [wordsize] [= value]\n"); - } else if (str[1]==' ') { - int word = 0; + // eprintf ("usage: drm [reg] [idx] [wordsize] [= value]\n"); + r_core_cmd_help (core, help_msg_drm); + } else if (str[1] == ' ' || str[1] == 'b' || str[1] == 'd' || str[1] == 'w' || str[1] == 'q') { + char explicit_index = 0; + char explicit_size = 0; +#define NUM_PACK_TYPES 4 + int pack_sizes[NUM_PACK_TYPES] = { 8, 16, 32, 64 }; + char *pack_format[NUM_PACK_TYPES] = { "%s0x%02" PFMT64x, "%s0x%04" PFMT64x, "%s0x%08" PFMT64x, "%s0x%016" PFMT64x }; +#define pack_print(i, reg, pack_type_index) r_cons_printf (pack_format[pack_type_index], i != 0? " ": "", reg); + char pack_show[NUM_PACK_TYPES] = { 0, 0, 0, 0 }; + int index = 0; int size = 0; // auto - char *q, *p, *name = strdup (str+2); - char *eq = strchr (name, '='); - if (eq) { - *eq++ = 0; - } - p = strchr (name, ' '); - if (p) { - *p++ = 0; - q = strchr (p, ' '); - if (q) { - *q++ = 0; - size = r_num_math (core->num, q); + char *q, *p, *name; + char *eq = NULL; + if (str[1] == ' ') { + name = strdup (str + 2); + if (eq) { + *eq++ = 0; + } + p = strchr (name, ' '); + if (p) { + *p++ = 0; + q = strchr (p, ' '); + if (p[0] != '*') { + // do not show whole register + explicit_index = 1; + index = r_num_math (core->num, p); + } + if (q) { + *q++ = 0; + size = r_num_math (core->num, q); + for (i = 0; i < NUM_PACK_TYPES; i++) { + if (size == pack_sizes[i]) { + explicit_size = 1; + pack_show[i] = 1; + } + } + if (!explicit_size) { + eprintf ("Unsupported wordsize %d\n", size); + break; + } + } + } + } else { + explicit_size = 1; + name = strdup (str + 3); + if (str[1] == 'b') { // "drmb" + size = pack_sizes[0]; + pack_show[0] = 1; + } else if (str[1] == 'w') { // "drmw" + size = pack_sizes[1]; + pack_show[1] = 1; + } else if (str[1] == 'd') { // "drmd" + size = pack_sizes[2]; + pack_show[2] = 1; + } else if (str[1] == 'q') { // "drmq" + size = pack_sizes[3]; + pack_show[3] = 1; } - word = r_num_math (core->num, p); } + // TODO: sanity check index, size against item->packed_size RRegItem *item = r_reg_get (core->dbg->reg, name, -1); if (item) { - if (eq) { + if (eq) { // TODO: fix setting xmm registers ut64 val = r_num_math (core->num, eq); - r_reg_set_pack (core->dbg->reg, item, word, size, val); + r_reg_set_pack (core->dbg->reg, item, index, size, val); r_debug_reg_sync (core->dbg, R_REG_TYPE_GPR, true); r_debug_reg_sync (core->dbg, R_REG_TYPE_MMX, true); } else { r_debug_reg_sync (core->dbg, R_REG_TYPE_GPR, false); r_debug_reg_sync (core->dbg, R_REG_TYPE_MMX, false); - ut64 res = r_reg_get_pack (core->dbg->reg, item, word, size); - r_cons_printf ("0x%08"PFMT64x"\n", res); + ut64 res = r_reg_get_pack (core->dbg->reg, item, index, size); + // TODO: handle mm + if (!explicit_index) { + int pi; + for (pi = 0; pi < NUM_PACK_TYPES; pi++) { + if (!explicit_size || pack_show[pi]) { + for (i = 0; i < item->packed_size / pack_sizes[pi]; i++) { + ut64 res = r_reg_get_pack (core->dbg->reg, item, i, pack_sizes[pi]); + pack_print (i, res, pi); + } + r_cons_printf ("\n"); + } + } + } else { + // print selected index / wordsize + r_cons_printf ("0x%08" PFMT64x "\n", res); + } } } else { eprintf ("cannot find multimedia register '%s'\n", name); } free (name); - } else { - r_debug_reg_sync (core->dbg, -R_REG_TYPE_MMX, false); + } else { // drm # no arg + r_debug_reg_sync (core->dbg, -R_REG_TYPE_MMX, false); // TODO: fix this, not displaying anything } //r_debug_drx_list (core->dbg); break; diff --git a/libr/debug/p/native/linux/reg/linux-x64.h b/libr/debug/p/native/linux/reg/linux-x64.h index 293129d229..e50d2920cf 100644 --- a/libr/debug/p/native/linux/reg/linux-x64.h +++ b/libr/debug/p/native/linux/reg/linux-x64.h @@ -144,28 +144,45 @@ return strdup ( "fpu st6 .80 128 0\n" "fpu st7 .80 144 0\n" -"fpu xmm0h .64 160 0\n" -"fpu xmm0l .64 168 0\n" +"mmx@fpu mm0 .64 32 8\n" +"mmx@fpu mm1 .64 48 8\n" +"mmx@fpu mm2 .64 64 8\n" +"mmx@fpu mm3 .64 80 8\n" +"mmx@fpu mm4 .64 96 8\n" +"mmx@fpu mm5 .64 112 8\n" +"mmx@fpu mm6 .64 128 8\n" +"mmx@fpu mm7 .64 144 8\n" -"fpu xmm1h .64 176 0\n" -"fpu xmm1l .64 184 0\n" +"fpu xmm0 .64 160 16\n" +"fpu xmm0h .64 160 8\n" +"fpu xmm0l .64 168 8\n" -"fpu xmm2h .64 192 0\n" -"fpu xmm2l .64 200 0\n" +"fpu xmm1 .64 176 16\n" +"fpu xmm1h .64 176 8\n" +"fpu xmm1l .64 184 8\n" -"fpu xmm3h .64 208 0\n" -"fpu xmm3l .64 216 0\n" +"fpu xmm2 .64 192 16\n" +"fpu xmm2h .64 192 8\n" +"fpu xmm2l .64 200 8\n" -"fpu xmm4h .64 224 0\n" -"fpu xmm4l .64 232 0\n" +"fpu xmm3 .64 208 16\n" +"fpu xmm3h .64 208 8\n" +"fpu xmm3l .64 216 8\n" -"fpu xmm5h .64 240 0\n" -"fpu xmm5l .64 248 0\n" +"fpu xmm4 .64 224 16\n" +"fpu xmm4h .64 224 8\n" +"fpu xmm4l .64 232 8\n" -"fpu xmm6h .64 256 0\n" -"fpu xmm6l .64 264 0\n" +"fpu xmm5 .64 240 16\n" +"fpu xmm5h .64 240 8\n" +"fpu xmm5l .64 248 8\n" -"fpu xmm7h .64 272 0\n" -"fpu xmm7l .64 280 0\n" +"fpu xmm6 .64 256 16\n" +"fpu xmm6h .64 256 8\n" +"fpu xmm6l .64 264 8\n" + +"fpu xmm7 .64 272 16\n" +"fpu xmm7h .64 272 8\n" +"fpu xmm7l .64 280 8\n" "fpu x64 .64 288 0\n" );