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librz/asm: improve plugin descriptions (#5012)

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Co-authored-by: Anton Kochkov <anton.kochkov@gmail.com>
This commit is contained in:
NOT XVilka 2025-03-19 03:14:03 +08:00 committed by GitHub
parent 5b5473e289
commit e282e551f3
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GPG key ID: B5690EEEBB952194
54 changed files with 193 additions and 225 deletions
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2
librz/arch/p/analysis/analysis_alpha_cs.c
View file

@ -459,7 +459,7 @@ static bool alpha_fini(void *u) {
RzAnalysisPlugin rz_analysis_plugin_alpha_cs = {
.name = "alpha",
.desc = "Capstone Alpha analysis plugin",
.desc = "DEC Alpha Capstone-based disassembler",
.license = "LGPL3",
.arch = "alpha",
.bits = 64,

2
librz/arch/p/asm/asm_8051.c
View file

@ -32,7 +32,7 @@ RzAsmPlugin rz_asm_plugin_8051 = {
.arch = "8051",
.bits = 8,
.endian = RZ_SYS_ENDIAN_NONE,
.desc = "8051 Intel CPU",
.desc = "Intel 8051 disassembler",
.disassemble = &disassemble,
.assemble = &assemble_8051,
.license = "PD",

2
librz/arch/p/asm/asm_alpha_cs.c
View file

@ -103,7 +103,7 @@ static bool fini(void *u) {
RzAsmPlugin rz_asm_plugin_alpha_cs = {
.name = "alpha",
.desc = "Capstone Alpha disassembler",
.desc = "DEC Alpha Capstone-based disassembler",
.license = "LGPL3",
.arch = "alpha",
.bits = 64,

2
librz/arch/p/asm/asm_amd29k.c
View file

@ -28,7 +28,7 @@ static int disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) {
RzAsmPlugin rz_asm_plugin_amd29k = {
.name = "amd29k",
.license = "LGPL3",
.desc = "AMD 29k RISC CPU",
.desc = "AMD 29k RISC disassembler",
.author = "deroad",
.arch = CPU_29000 "," CPU_29050,
.cpus = "amd29k",

2
librz/arch/p/asm/asm_arm_cs.c
View file

@ -299,7 +299,7 @@ char **arm_cpu_descriptions() {
RzAsmPlugin rz_asm_plugin_arm_cs = {
.name = "arm",
.desc = "Capstone ARM disassembler",
.desc = "ARM Capstone-based disassembler",
.cpus = "arm,v8,cortexm,arm1176,cortexA72,cortexA8",
.platforms = "bcm2835,omap3430",
.features = "v8",

2
librz/arch/p/asm/asm_avr.c
View file

@ -65,7 +65,7 @@ RzAsmPlugin rz_asm_plugin_avr = {
.license = "LGPL3",
.bits = 8 | 16,
.endian = RZ_SYS_ENDIAN_LITTLE | RZ_SYS_ENDIAN_BIG,
.desc = "AVR Atmel",
.desc = "Atmel AVR disassembler",
.disassemble = &disassemble,
.assemble = &assemble,
.cpus =

2
librz/arch/p/asm/asm_cil.c
View file

@ -17,7 +17,7 @@ static int disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) {
RzAsmPlugin rz_asm_plugin_cil = {
.name = "cil",
.arch = "cil",
.desc = ".NET Common Intermediate Language",
.desc = ".NET CIL/MSIL (Common Intermediate Language) bytecode disassembler",
.license = "LGPL3",
.bits = 16 | 32 | 64,
.disassemble = &disassemble,

2
librz/arch/p/asm/asm_cr16.c
View file

@ -22,7 +22,7 @@ static int cr16_disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) {
RzAsmPlugin rz_asm_plugin_cr16 = {
.name = "cr16",
.license = "LGPL3",
.desc = "cr16 disassembly plugin",
.desc = "CompactRISC CR16 disassembler",
.arch = "cr16",
.bits = 16,
.endian = RZ_SYS_ENDIAN_LITTLE,

2
librz/arch/p/asm/asm_dalvik.c
View file

@ -548,7 +548,7 @@ RzAsmPlugin rz_asm_plugin_dalvik = {
.name = "dalvik",
.arch = "dalvik",
.license = "LGPL3",
.desc = "AndroidVM Dalvik",
.desc = "Dalvik (Android VM) bytecode disassembler",
.bits = 32 | 64,
.endian = RZ_SYS_ENDIAN_LITTLE,
.disassemble = &dalvik_disassemble,

2
librz/arch/p/asm/asm_dcpu16.c
View file

@ -31,7 +31,7 @@ RzAsmPlugin rz_asm_plugin_dcpu16 = {
.arch = "dpcu",
.bits = 16,
.endian = RZ_SYS_ENDIAN_LITTLE,
.desc = "Mojang's DCPU-16",
.desc = "Mojang's DCPU-16 disassembler",
.license = "PD",
.disassemble = &disassemble,
.assemble = &assemble

2
librz/arch/p/asm/asm_ebc.c
View file

@ -23,7 +23,7 @@ static int disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) {
RzAsmPlugin rz_asm_plugin_ebc = {
.name = "ebc",
.license = "LGPL3",
.desc = "EFI Bytecode",
.desc = "EFI bytecode disassembler",
.author = "Fedor Sakharov",
.arch = "ebc",
.bits = 32 | 64,

2
librz/arch/p/asm/asm_h8300.c
View file

@ -18,7 +18,7 @@ static int disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) {
RzAsmPlugin rz_asm_plugin_h8300 = {
.name = "h8300",
.license = "LGPL3",
.desc = "H8/300 disassembly plugin",
.desc = "Hitachi/Renesas H8/300 disassembly plugin",
.arch = "h8300",
.bits = 16,
.endian = RZ_SYS_ENDIAN_BIG,

2
librz/arch/p/asm/asm_i4004.c
View file

@ -14,7 +14,7 @@ static int disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) {
RzAsmPlugin rz_asm_plugin_i4004 = {
.name = "i4004",
.desc = "Intel 4004 microprocessor",
.desc = "Intel 4004 disassembler",
.arch = "i4004",
.license = "LGPL3",
.bits = 4,

2
librz/arch/p/asm/asm_i8080.c
View file

@ -14,7 +14,7 @@ static int do_disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) {
RzAsmPlugin rz_asm_plugin_i8080 = {
.name = "i8080",
.desc = "Intel 8080 CPU",
.desc = "Intel 8080 disassembler",
.arch = "i8080",
.license = "BSD",
.bits = 8,

2
librz/arch/p/asm/asm_lm32.c
View file

@ -429,7 +429,7 @@ static int disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) {
RzAsmPlugin rz_asm_plugin_lm32 = {
.name = "lm32",
.arch = "lm32",
.desc = "disassembly plugin for Lattice Micro 32 ISA",
.desc = "Lattice Micro 32 ISA disassembler",
.author = "Felix Held",
.license = "BSD",
.bits = 32,

2
librz/arch/p/asm/asm_loongarch_cs.c
View file

@ -75,7 +75,7 @@ static bool loongarch_asm_fini(void *u) {
RzAsmPlugin rz_asm_plugin_loongarch_cs = {
.name = "loongarch",
.desc = "Capstone Alpha disassembler",
.desc = "Loongson LoongArch disassembler",
.license = "LGPL3",
.arch = "loongarch",
.bits = 32 | 64,

4
librz/arch/p/asm/asm_luac.c
View file

@ -61,7 +61,7 @@ RzAsmPlugin rz_asm_plugin_luac = {
.arch = "luac",
.license = "LGPL3",
.bits = 8,
.desc = "luac disassemble plugin",
.desc = "Lua bytecode (LUAC) disassembler",
.disassemble = &rz_luac_disasm,
.assemble = &rz_luac_asm,
};
@ -72,4 +72,4 @@ RZ_API RzLibStruct rizin_plugin = {
.data = rz_asm_plugin_luac,
.version = RZ_VERSION
};
#endif
#endif

2
librz/arch/p/asm/asm_m680x_cs.c
View file

@ -99,7 +99,7 @@ char **m680x_cpu_descriptions() {
RzAsmPlugin rz_asm_plugin_m680x_cs = {
.name = "m680x",
.cpus = "6800,6801,6805,6808,6809,6811,cpu12,6301,6309,hcs08",
.desc = "Capstone M680X Disassembler",
.desc = "Motorola 680X Capstone-based disassembler",
.license = "BSD",
.arch = "m680x",
.bits = 8 | 32,

35
librz/arch/p/asm/asm_m68k_cs.c
View file

@ -5,18 +5,6 @@
#include <rz_lib.h>
#include <capstone/capstone.h>
#ifdef CAPSTONE_M68K_H
#define CAPSTONE_HAS_M68K 1
#else
#define CAPSTONE_HAS_M68K 0
#ifdef _MSC_VER
#pragma message("Cannot find capstone-m68k support")
#else
#warning Cannot find capstone-m68k support
#endif
#endif
#if CAPSTONE_HAS_M68K
#include "cs_helper.h"
CAPSTONE_DEFINE_PLUGIN_FUNCTIONS(m68k_asm);
@ -130,7 +118,7 @@ char **m68k_cpu_descriptions() {
RzAsmPlugin rz_asm_plugin_m68k_cs = {
.name = "m68k",
.desc = "Capstone M68K disassembler",
.desc = "Motorola 68K Capstone-based disassembler",
.cpus = "68000,68010,68020,68030,68040,68060",
.license = "BSD",
.arch = "m68k",
@ -150,24 +138,3 @@ RZ_API RzLibStruct rizin_plugin = {
.version = RZ_VERSION
};
#endif
#else
RzAsmPlugin rz_asm_plugin_m68k_cs = {
.name = "m68k.cs (unsupported)",
.desc = "Capstone M68K disassembler (unsupported)",
.license = "BSD",
.author = "pancake",
.arch = "m68k",
.bits = 32,
.endian = RZ_SYS_ENDIAN_BIG,
};
#ifndef RZ_PLUGIN_INCORE
RZ_API RzLibStruct rizin_plugin = {
.type = RZ_LIB_TYPE_ASM,
.data = &rz_asm_plugin_m68k_cs,
.version = RZ_VERSION
};
#endif
#endif

2
librz/arch/p/asm/asm_malbolge.c
View file

@ -30,7 +30,7 @@ static int __disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) {
RzAsmPlugin rz_asm_plugin_malbolge = {
.name = "malbolge",
.desc = "Malbolge Ternary VM",
.desc = "Malbolge Ternary VM bytecode disassembler",
.arch = "malbolge",
.author = "condret",
.license = "LGPL3",

3
librz/arch/p/asm/asm_mcs96.c
View file

@ -109,9 +109,10 @@ static int disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) {
RzAsmPlugin rz_asm_plugin_mcs96 = {
.name = "mcs96",
.desc = "condrets car",
.desc = "Intel MCS-96 disassembler",
.arch = "mcs96",
.license = "LGPL3",
.author = "condret",
.bits = 16,
.endian = RZ_SYS_ENDIAN_NONE,
.disassemble = &disassemble

2
librz/arch/p/asm/asm_mips_cs.c
View file

@ -134,7 +134,7 @@ char **mips_cpu_descriptions() {
RzAsmPlugin rz_asm_plugin_mips_cs = {
.name = "mips",
.desc = "Capstone MIPS disassembler",
.desc = "MIPS Capstone-based disassembler",
.license = "BSD",
.arch = "mips",
.cpus = MIPS_CPUS,

2
librz/arch/p/asm/asm_msp430.c
View file

@ -29,7 +29,7 @@ fail:
RzAsmPlugin rz_asm_plugin_msp430 = {
.name = "msp430",
.license = "LGPL3",
.desc = "msp430 disassembly plugin",
.desc = "Texas Instruments MSP430 disassembler",
.arch = "msp430",
.bits = 16,
.endian = RZ_SYS_ENDIAN_LITTLE,

2
librz/arch/p/asm/asm_null.c
View file

@ -26,7 +26,7 @@ RzAsmPlugin rz_asm_plugin_null = {
.license = "MIT",
.bits = 16 | 32 | 64,
.endian = RZ_SYS_ENDIAN_NONE,
.desc = "no disassemble",
.desc = "NULL (empty) disassembler",
.disassemble = &disassemble,
.assemble = &assemble
};

2
librz/arch/p/asm/asm_or1k.c
View file

@ -146,7 +146,7 @@ static int or1k_disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) {
RzAsmPlugin rz_asm_plugin_or1k = {
.name = "or1k",
.desc = "OpenRISC 1000",
.desc = "OpenRISC 1000 disassembler",
.license = "LGPL3",
.arch = "or1k",
.bits = 32,

2
librz/arch/p/asm/asm_pic.c
View file

@ -46,7 +46,7 @@ RzAsmPlugin rz_asm_plugin_pic = {
.cpus = "baseline,midrange,highend,pic18",
.bits = 16 | 32,
.license = "LGPL3",
.desc = "PIC disassembler",
.desc = "Microchip PIC disassembler",
.disassemble = &asm_pic_disassemble,
.get_cpu_desc = pic_cpu_descriptions,
};

2
librz/arch/p/asm/asm_ppc_cs.c
View file

@ -129,7 +129,7 @@ char **ppc_cpu_descriptions() {
RzAsmPlugin rz_asm_plugin_ppc_cs = {
.name = "ppc",
.desc = "Capstone PowerPC disassembler",
.desc = "PowerPC Capstone-based disassembler",
.license = "BSD",
.author = "pancake",
.arch = "ppc",

2
librz/arch/p/asm/asm_propeller.c
View file

@ -27,7 +27,7 @@ static int propeller_disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len)
RzAsmPlugin rz_asm_plugin_propeller = {
.name = "propeller",
.license = "LGPL3",
.desc = "propeller disassembly plugin",
.desc = "Parallax Propeller disassembler",
.arch = "propeller",
.bits = 32,
.endian = RZ_SYS_ENDIAN_BIG,

2
librz/arch/p/asm/asm_pyc.c
View file

@ -57,7 +57,7 @@ RzAsmPlugin rz_asm_plugin_pyc = {
.arch = "pyc",
.license = "LGPL3",
.bits = 16 | 8,
.desc = "PYC disassemble plugin",
.desc = "Python bytecode (PYC) disassembler",
.disassemble = &pyc_asm_disassemble,
.fini = &pyc_asm_finish,
};

2
librz/arch/p/asm/asm_riscv_cs.c
View file

@ -50,7 +50,7 @@ fin:
RzAsmPlugin rz_asm_plugin_riscv_cs = {
.name = "riscv.cs",
.desc = "Capstone RISCV disassembler",
.desc = "RISC-V Capstone-based disassembler",
.license = "BSD",
.arch = "riscv",
.cpus = "",

2
librz/arch/p/asm/asm_rsp.c
View file

@ -88,7 +88,7 @@ static int rsp_disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) {
RzAsmPlugin rz_asm_plugin_rsp = {
.name = "rsp",
.desc = "Reality Signal Processor",
.desc = "Nintendo N64 Reality Signal Processor disassembler",
.arch = "rsp",
.bits = 32,
.endian = RZ_SYS_ENDIAN_BI, /* For conveniance, we don't force BIG endian but allow both to be used */

2
librz/arch/p/asm/asm_sh.c
View file

@ -42,7 +42,7 @@ RzAsmPlugin rz_asm_plugin_sh = {
.license = "LGPL3",
.bits = 32,
.endian = RZ_SYS_ENDIAN_LITTLE | RZ_SYS_ENDIAN_BIG,
.desc = "SuperH-4 CPU",
.desc = "Hitachi/Renesas SuperH-4 disassembler",
.disassemble = &disassemble,
.assemble = &assemble
};

2
librz/arch/p/asm/asm_snes.c
View file

@ -47,7 +47,7 @@ static bool snes_asm_fini(void *user) {
RzAsmPlugin rz_asm_plugin_snes = {
.name = "snes",
.desc = "SuperNES CPU",
.desc = "SuperNES CPU disassembler",
.arch = "snes",
.bits = 8 | 16,
.init = snes_asm_init,

2
librz/arch/p/asm/asm_sparc_cs.c
View file

@ -75,7 +75,7 @@ char **sparc_cpu_descriptions() {
RzAsmPlugin rz_asm_plugin_sparc_cs = {
.name = "sparc",
.desc = "Capstone SPARC disassembler",
.desc = "Sun SPARC Capstone-based disassembler",
.license = "BSD",
.arch = "sparc",
.cpus = "v9",

2
librz/arch/p/asm/asm_spc700.c
View file

@ -16,7 +16,7 @@ static int disassemble(RzAsm *a, RzAsmOp *rz_op, const ut8 *buf, int len) {
RzAsmPlugin rz_asm_plugin_spc700 = {
.name = "spc700",
.desc = "spc700, snes' sound-chip",
.desc = "Sony SPC700 (Nintendo SuperNES sound-chip) disassembler",
.arch = "spc700",
.license = "LGPL3",
.bits = 16,

2
librz/arch/p/asm/asm_sysz.c
View file

@ -58,7 +58,7 @@ static int sysz_disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) {
RzAsmPlugin rz_asm_plugin_sysz = {
.name = "sysz",
.desc = "SystemZ CPU disassembler",
.desc = "IBM SystemZ (S/390) Capstone-based disassembler",
.license = "BSD",
.arch = "sysz",
.bits = 32 | 64,

2
librz/arch/p/asm/asm_tms320.c
View file

@ -76,7 +76,7 @@ RzAsmPlugin rz_asm_plugin_tms320 = {
.name = "tms320",
.arch = "tms320",
.cpus = "c54x,c55x,c55x+,c64x",
.desc = "TMS320 DSP family (c54x,c55x,c55x+,c64x)",
.desc = "Texas Instruments TMS320 DSP family (c54x,c55x,c55x+,c64x) disassembler",
.license = "LGPL3",
.bits = 32,
.endian = RZ_SYS_ENDIAN_LITTLE | RZ_SYS_ENDIAN_BIG,

2
librz/arch/p/asm/asm_tricore_cs.c
View file

@ -119,7 +119,7 @@ RzAsmPlugin rz_asm_plugin_tricore_cs = {
.license = "BSD",
.bits = 32,
.endian = RZ_SYS_ENDIAN_LITTLE,
.desc = "Siemens TriCore CPU",
.desc = "Siemens TriCore Capstone-based disassembler",
.disassemble = &disassemble,
.init = &init,
.fini = &fini,

2
librz/arch/p/asm/asm_v810.c
View file

@ -27,7 +27,7 @@ static int v810_disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) {
RzAsmPlugin rz_asm_plugin_v810 = {
.name = "v810",
.license = "LGPL3",
.desc = "v810 disassembly plugin",
.desc = "NEC V810 disassembler",
.author = "pancake",
.arch = "v810",
.bits = 32,

2
librz/arch/p/asm/asm_v850.c
View file

@ -27,7 +27,7 @@ static int v850_disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) {
RzAsmPlugin rz_asm_plugin_v850 = {
.name = "v850",
.license = "LGPL3",
.desc = "v850 disassembly plugin",
.desc = "NEC/Renesas V850 disassembler",
.arch = "v850",
.bits = 32,
.endian = RZ_SYS_ENDIAN_LITTLE,

2
librz/arch/p/asm/asm_wasm.c
View file

@ -35,7 +35,7 @@ RzAsmPlugin rz_asm_plugin_wasm = {
.license = "MIT",
.bits = 32,
.endian = RZ_SYS_ENDIAN_LITTLE,
.desc = "WebAssembly",
.desc = "WebAssembly disassembler",
.disassemble = &disassemble,
.assemble = &assemble
};

2
librz/arch/p/asm/asm_x86_cs.c
View file

@ -133,7 +133,7 @@ static int x86_disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) {
RzAsmPlugin rz_asm_plugin_x86_cs = {
.name = "x86",
.desc = "Capstone X86 disassembler",
.desc = "X86/X86_64 Capstone-based disassembler",
.license = "BSD",
.cpus = "generic",
.platforms = "generic",

2
librz/arch/p/asm/asm_xap.c
View file

@ -30,6 +30,6 @@ RzAsmPlugin rz_asm_plugin_xap = {
.license = "PD",
.bits = 16,
.endian = RZ_SYS_ENDIAN_LITTLE,
.desc = "XAP4 RISC (CSR)",
.desc = "Cambridge Consultants XAP4 RISC (CSR) disassembler",
.disassemble = &disassemble
};

2
librz/arch/p/asm/asm_xcore_cs.c
View file

@ -57,7 +57,7 @@ fin:
RzAsmPlugin rz_asm_plugin_xcore_cs = {
.name = "xcore",
.desc = "Capstone XCore disassembler",
.desc = "XCore Capstone-based disassembler",
.license = "BSD",
.author = "pancake",
.arch = "xcore",

2
librz/arch/p/asm/asm_xtensa_cs.c
View file

@ -42,7 +42,7 @@ char **xtensa_cpu_descriptions() {
RzAsmPlugin rz_asm_plugin_xtensa_cs = {
.name = "xtensa",
.license = "LGPL3",
.desc = "Capstone Xtensa disassembly plugin",
.desc = "Tensilica Xtensa Capstone-based disassembler",
.author = "billow",
.arch = "xtensa",
.cpus = "esp32,esp32s2,esp8266",

2
librz/arch/p_gnu/asm/asm_cris_gnu.c
View file

@ -135,6 +135,6 @@ RzAsmPlugin rz_asm_plugin_cris_gnu = {
.author = "pancake",
.bits = 32,
.endian = RZ_SYS_ENDIAN_LITTLE,
.desc = "Axis Communications 32-bit embedded processor",
.desc = "Axis Communications 32-bit embedded processor disassembler",
.disassemble = &disassemble
};

2
librz/arch/p_gnu/asm/asm_lanai_gnu.c
View file

@ -71,6 +71,6 @@ RzAsmPlugin rz_asm_plugin_lanai_gnu = {
.license = "GPL3",
.bits = 32,
.endian = RZ_SYS_ENDIAN_BIG,
.desc = "LANAI",
.desc = "Google LANAI disassembler",
.disassemble = &disassemble
};

2
librz/arch/p_gnu/asm/asm_riscv_gnu.c
View file

@ -12,7 +12,7 @@ static int riscv_gnu_disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len)
RzAsmPlugin rz_asm_plugin_riscv_gnu = {
.name = "riscv",
.desc = "RISC-V",
.desc = "RISC-V disassembler",
.arch = "riscv",
.bits = 32 | 64,
.endian = RZ_SYS_ENDIAN_LITTLE | RZ_SYS_ENDIAN_BIG,

2
librz/arch/p_gnu/asm/asm_sparc_gnu.c
View file

@ -102,6 +102,6 @@ RzAsmPlugin rz_asm_plugin_sparc_gnu = {
.license = "GPL3",
.init = sparc_gnu_init,
.fini = sparc_gnu_fini,
.desc = "Scalable Processor Architecture",
.desc = "Sun SPARC disassembler",
.disassemble = &disassemble,
};

2
librz/arch/p_gnu/asm/asm_vax_gnu.c
View file

@ -77,6 +77,6 @@ RzAsmPlugin rz_asm_plugin_vax_gnu = {
.license = "GPL3",
.bits = 8 | 32,
.endian = RZ_SYS_ENDIAN_LITTLE,
.desc = "VAX",
.desc = "DEC VAX disassembler",
.disassemble = &disassemble
};

2
librz/arch/p_gnu/asm/asm_z80_gnu.c
View file

@ -16,7 +16,7 @@ static int do_assemble(RzAsm *a, RzAsmOp *op, const char *buf) {
RzAsmPlugin rz_asm_plugin_z80_gnu = {
.name = "z80",
.desc = "Zilog Z80",
.desc = "Zilog Z80 disassembler",
.license = "GPL3",
.author = "condret",
.arch = "z80",

100
test/db/cmd/cmd_aL
View file

@ -3,72 +3,72 @@ FILE==
CMDS=aL
EXPECT=<<EOF
_dAeI 8 16 6502 LGPL3 6502/NES/C64/Tamagotchi/T-1000 CPU
adAeI 8 8051 PD 8051 Intel CPU
_dA__ 64 alpha LGPL3 Capstone Alpha disassembler
_dA__ 32 amd29k LGPL3 AMD 29k RISC CPU (by deroad)
adAeI 8 8051 PD Intel 8051 disassembler
_dA__ 64 alpha LGPL3 DEC Alpha Capstone-based disassembler
_dA__ 32 amd29k LGPL3 AMD 29k RISC disassembler (by deroad)
_dA__ 16 32 arc GPL3 Argonaut RISC Core
adAeI 16 32 64 arm BSD Capstone ARM disassembler
adAeI 16 32 64 arm BSD ARM Capstone-based disassembler
a____ 16 32 64 arm.as LGPL3 as ARM Assembler (use RZ_ARM32_AS and RZ_ARM64_AS environment) (by pancake)
adAeI 8 16 avr LGPL3 AVR Atmel
adAeI 8 16 avr LGPL3 Atmel AVR disassembler
adA_I 16 32 64 bf LGPL3 Brainfuck (by pancake, nibble) v4.0.0
_dA__ 32 chip8 LGPL3 Chip8 disassembler
_dA__ 16 32 64 cil LGPL3 .NET Common Intermediate Language
_dA__ 16 cr16 LGPL3 cr16 disassembly plugin
_dA__ 32 cris GPL3 Axis Communications 32-bit embedded processor (by pancake)
adA__ 32 64 dalvik LGPL3 AndroidVM Dalvik
ad___ 16 dcpu16 PD Mojang's DCPU-16
_dA__ 32 64 ebc LGPL3 EFI Bytecode (by Fedor Sakharov)
_dA__ 16 32 64 cil LGPL3 .NET CIL/MSIL (Common Intermediate Language) bytecode disassembler
_dA__ 16 cr16 LGPL3 CompactRISC CR16 disassembler
_dA__ 32 cris GPL3 Axis Communications 32-bit embedded processor disassembler (by pancake)
adA__ 32 64 dalvik LGPL3 Dalvik (Android VM) bytecode disassembler
ad___ 16 dcpu16 PD Mojang's DCPU-16 disassembler
_dA__ 32 64 ebc LGPL3 EFI bytecode disassembler (by Fedor Sakharov)
adAeI 16 gb LGPL3 GameBoy(TM) (z80-like) (by condret)
_dAe_ 16 h8300 LGPL3 H8/300 disassembly plugin
_dAe_ 16 h8300 LGPL3 Hitachi/Renesas H8/300 disassembly plugin
_dA_I 32 hexagon LGPL3 Qualcomm Hexagon (QDSP6) V6 (by Rot127)
_d___ 32 hppa GPL3 HP PA-RISC
_dA__ 4 i4004 LGPL3 Intel 4004 microprocessor
_dA__ 8 i8080 BSD Intel 8080 CPU
_dA__ 4 i4004 LGPL3 Intel 4004 disassembler
_dA__ 8 i8080 BSD Intel 8080 disassembler
adA__ 32 java LGPL-3 Java bytecode disassembler (by deroad)
_d___ 32 lanai GPL3 LANAI
_d___ 32 lanai GPL3 Google LANAI disassembler
_d___ 8 lh5801 LGPL3 SHARP LH5801 disassembler
_d___ 32 lm32 BSD disassembly plugin for Lattice Micro 32 ISA (by Felix Held)
_dA__ 32 64 loongarch LGPL3 Capstone Alpha disassembler
adA__ 8 luac LGPL3 luac disassemble plugin
_dA__ 8 32 m680x BSD Capstone M680X Disassembler
_dA__ 32 m68k BSD Capstone M68K disassembler
_dA__ 32 malbolge LGPL3 Malbolge Ternary VM (by condret)
_d___ 32 lm32 BSD Lattice Micro 32 ISA disassembler (by Felix Held)
_dA__ 32 64 loongarch LGPL3 Loongson LoongArch disassembler
adA__ 8 luac LGPL3 Lua bytecode (LUAC) disassembler
_dA__ 8 32 m680x BSD Motorola 680X Capstone-based disassembler
_dA__ 32 m68k BSD Motorola 68K Capstone-based disassembler
_dA__ 32 malbolge LGPL3 Malbolge Ternary VM bytecode disassembler (by condret)
_dA__ 32 mcore LGPL3 Motorola MCORE disassembler
_d___ 16 mcs96 LGPL3 condrets car
adAeI 16 32 64 mips BSD Capstone MIPS disassembler
_dA_I 16 msp430 LGPL3 msp430 disassembly plugin
adA__ 16 32 64 null MIT no disassemble (by pancake) v1.0.0
_dA__ 32 or1k LGPL3 OpenRISC 1000
_dAeI 16 32 pic LGPL3 PIC disassembler
_dAeI 32 64 ppc BSD Capstone PowerPC disassembler (by pancake)
_d___ 16 mcs96 LGPL3 Intel MCS-96 disassembler (by condret)
adAeI 16 32 64 mips BSD MIPS Capstone-based disassembler
_dA_I 16 msp430 LGPL3 Texas Instruments MSP430 disassembler
adA__ 16 32 64 null MIT NULL (empty) disassembler (by pancake) v1.0.0
_dA__ 32 or1k LGPL3 OpenRISC 1000 disassembler
_dAeI 16 32 pic LGPL3 Microchip PIC disassembler
_dAeI 32 64 ppc BSD PowerPC Capstone-based disassembler (by pancake)
a____ 32 64 ppc.as LGPL3 as PPC Assembler (use RZ_PPC_AS environment) (by eagleoflqj)
_dA__ 32 propeller LGPL3 propeller disassembly plugin
_dA__ 8 16 pyc LGPL3 PYC disassemble plugin
_dAe_ 32 64 riscv GPL3 RISC-V
_dAe_ 32 64 riscv.cs BSD Capstone RISCV disassembler
_dA__ 32 propeller LGPL3 Parallax Propeller disassembler
_dA__ 8 16 pyc LGPL3 Python bytecode (PYC) disassembler
_dAe_ 32 64 riscv GPL3 RISC-V disassembler
_dAe_ 32 64 riscv.cs BSD RISC-V Capstone-based disassembler
adA__ 32 rl78 LGPL3 Renesas RL78 disassembler (by Bastian Engel)
_dA__ 32 rsp LGPL3 Reality Signal Processor
_dA__ 32 rsp LGPL3 Nintendo N64 Reality Signal Processor disassembler
_dA__ 32 rx LGPL3 Renesas RX Family disassembler (by Heersin)
adAeI 32 sh LGPL3 SuperH-4 CPU (by DMaroo)
_dA__ 8 16 snes LGPL3 SuperNES CPU
_dA__ 32 64 sparc BSD Capstone SPARC disassembler
_dA__ 32 64 sparc.gnu GPL3 Scalable Processor Architecture
_dA__ 16 spc700 LGPL3 spc700, snes' sound-chip
_dA__ 32 64 sysz BSD SystemZ CPU disassembler
_dA__ 32 tms320 LGPL3 TMS320 DSP family (c54x,c55x,c55x+,c64x)
_dA_I 32 tricore BSD Siemens TriCore CPU (by billow)
_dAeI 32 v810 LGPL3 v810 disassembly plugin (by pancake)
_dAeI 32 v850 LGPL3 v850 disassembly plugin
_dA__ 8 32 vax GPL3 VAX
adA__ 32 wasm MIT WebAssembly (by cgvwzq) v0.1.0
_dAeI 16 32 64 x86 BSD Capstone X86 disassembler
adAeI 32 sh LGPL3 Hitachi/Renesas SuperH-4 disassembler (by DMaroo)
_dA__ 8 16 snes LGPL3 SuperNES CPU disassembler
_dA__ 32 64 sparc BSD Sun SPARC Capstone-based disassembler
_dA__ 32 64 sparc.gnu GPL3 Sun SPARC disassembler
_dA__ 16 spc700 LGPL3 Sony SPC700 (Nintendo SuperNES sound-chip) disassembler
_dA__ 32 64 sysz BSD IBM SystemZ (S/390) Capstone-based disassembler
_dA__ 32 tms320 LGPL3 Texas Instruments TMS320 DSP family (c54x,c55x,c55x+,c64x) disassembler
_dA_I 32 tricore BSD Siemens TriCore Capstone-based disassembler (by billow)
_dAeI 32 v810 LGPL3 NEC V810 disassembler (by pancake)
_dAeI 32 v850 LGPL3 NEC/Renesas V850 disassembler
_dA__ 8 32 vax GPL3 DEC VAX disassembler
adA__ 32 wasm MIT WebAssembly disassembler (by cgvwzq) v0.1.0
_dAeI 16 32 64 x86 BSD X86/X86_64 Capstone-based disassembler
a____ 16 32 64 x86.as LGPL3 Intel X86 GNU Assembler (Use RZ_X86_AS env)
a____ 16 32 64 x86.nasm LGPL3 X86 nasm assembler
a____ 16 32 64 x86.nz LGPL3 x86 handmade assembler
_dA__ 16 xap PD XAP4 RISC (CSR)
_dA__ 32 xcore BSD Capstone XCore disassembler (by pancake)
_dAeI 32 xtensa LGPL3 Capstone Xtensa disassembly plugin (by billow)
adA__ 8 z80 GPL3 Zilog Z80 (by condret)
_dA__ 16 xap PD Cambridge Consultants XAP4 RISC (CSR) disassembler
_dA__ 32 xcore BSD XCore Capstone-based disassembler (by pancake)
_dAeI 32 xtensa LGPL3 Tensilica Xtensa Capstone-based disassembler (by billow)
adA__ 8 z80 GPL3 Zilog Z80 disassembler (by condret)
EOF
RUN

178
test/db/cmd/cmd_list
View file

File diff suppressed because one or more lines are too long

2
test/db/tools/rz_asm
View file

@ -4,7 +4,7 @@ CMDS=<<EOF
!rz-asm -L~4004
EOF
EXPECT=<<EOF
_dA__ 4 i4004 LGPL3 Intel 4004 microprocessor
_dA__ 4 i4004 LGPL3 Intel 4004 disassembler
EOF
RUN