Remove mips.gnu (#4802)
This commit is contained in:
Giovanni
GitHub
parent
8427ea95fe
commit
f623f70c01
8 changed files with 14 additions and 2076 deletions
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@ -349,7 +349,6 @@ if get_option('use_gpl')
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'cris_gnu',
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'hppa_gnu',
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'lanai_gnu',
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'mips_gnu',
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'riscv_gnu',
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'sparc_gnu',
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'vax_gnu',
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@ -362,7 +361,6 @@ if get_option('use_gpl')
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'p_gnu/arch_cris.c',
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'p_gnu/arch_hppa.c',
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'p_gnu/arch_lanai.c',
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'p_gnu/arch_mips.c',
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'p_gnu/arch_riscv.c',
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'p_gnu/arch_sparc.c',
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'p_gnu/arch_vax.c',
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@ -380,9 +378,6 @@ if get_option('use_gpl')
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'isa_gnu/hppa/hppa-dis.c',
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'isa_gnu/lanai/lanai-dis.c',
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'isa_gnu/lanai/lanai-opc.c',
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'isa_gnu/mips/mips-dis.c',
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'isa_gnu/mips/mips-opc.c',
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'isa_gnu/mips/mips16-opc.c',
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# 'isa_gnu/riscv/riscv-opc.c',
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# 'isa_gnu/riscv/riscv.c',
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'isa_gnu/sparc/sparc-dis.c',
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File diff suppressed because it is too large
Load diff
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@ -1,10 +0,0 @@
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// SPDX-FileCopyrightText: 2024 RizinOrg <info@rizin.re>
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// SPDX-FileCopyrightText: 2024 deroad <wargio@libero.it>
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// SPDX-License-Identifier: LGPL-3.0-only
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#include <deprecated_arch_helper.h>
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#include "analysis/analysis_mips_gnu.c"
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#include "asm/asm_mips_gnu.c"
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RZ_ARCH_PLUGIN_DEFINE_DEPRECATED(mips_gnu);
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@ -1,158 +0,0 @@
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// SPDX-FileCopyrightText: 2009-2018 pancake <pancake@nopcode.org>
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// SPDX-FileCopyrightText: 2009-2018 nibble <nibble.ds@gmail.com>
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// SPDX-License-Identifier: LGPL-3.0-only
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#include <stdio.h>
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#include <stdarg.h>
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#include <string.h>
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#include <rz_types.h>
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#include <rz_lib.h>
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#include <rz_util.h>
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#include <rz_asm.h>
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#include <common_gnu/disas-asm.h>
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#include <common_gnu/opcode/mips.h>
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#include <mips/mips_assembler.h>
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static int mips_mode = 0;
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static unsigned long Offset = 0;
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static RzStrBuf *buf_global = NULL;
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static unsigned char bytes[4];
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static char *pre_cpu = NULL;
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static char *pre_features = NULL;
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static int mips_buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, unsigned int length, struct disassemble_info *info) {
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int delta = (memaddr - Offset);
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if (delta < 0) {
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return -1; // disable backward reads
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}
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if ((delta + length) > 4) {
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return -1;
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}
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memcpy(myaddr, bytes + delta, length);
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return 0;
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}
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static int symbol_at_address(bfd_vma addr, struct disassemble_info *info) {
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return 0;
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}
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static void memory_error_func(int status, bfd_vma memaddr, struct disassemble_info *info) {
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//--
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}
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DECLARE_GENERIC_PRINT_ADDRESS_FUNC()
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DECLARE_GENERIC_FPRINTF_FUNC()
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typedef struct {
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struct disassemble_info disasm_obj;
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} MIPSGnuContext;
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static int mips_gnu_disassemble(struct rz_asm_t *a, struct rz_asm_op_t *op, const ut8 *buf, int len) {
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MIPSGnuContext *ctx = (MIPSGnuContext *)a->plugin_data;
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if (len < 4) {
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return -1;
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}
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buf_global = &op->buf_asm;
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Offset = a->pc;
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memcpy(bytes, buf, 4); // TODO handle thumb
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if ((a->cpu != pre_cpu) && (a->features != pre_features)) {
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free(ctx->disasm_obj.disassembler_options);
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memset(&ctx->disasm_obj, '\0', sizeof(struct disassemble_info));
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}
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/* prepare disassembler */
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if (a->cpu && (!pre_cpu || !strcmp(a->cpu, pre_cpu))) {
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if (!rz_str_casecmp(a->cpu, "mips64r2")) {
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ctx->disasm_obj.mach = bfd_mach_mipsisa64r2;
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} else if (!rz_str_casecmp(a->cpu, "mips32r2")) {
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ctx->disasm_obj.mach = bfd_mach_mipsisa32r2;
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} else if (!rz_str_casecmp(a->cpu, "mips64")) {
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ctx->disasm_obj.mach = bfd_mach_mipsisa64;
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} else if (!rz_str_casecmp(a->cpu, "mips32")) {
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ctx->disasm_obj.mach = bfd_mach_mipsisa32;
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}
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char *tmp = rz_str_dup(a->cpu);
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free(pre_cpu);
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pre_cpu = tmp;
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}
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if (a->features && (!pre_features || !strcmp(a->features, pre_features))) {
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free(ctx->disasm_obj.disassembler_options);
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if (strstr(a->features, "n64")) {
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ctx->disasm_obj.disassembler_options = rz_str_dup("abi=n64");
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} else if (strstr(a->features, "n32")) {
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ctx->disasm_obj.disassembler_options = rz_str_dup("abi=n32");
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} else if (strstr(a->features, "o32")) {
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ctx->disasm_obj.disassembler_options = rz_str_dup("abi=o32");
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}
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char *tmp = rz_str_dup(a->features);
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free(pre_features);
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pre_features = tmp;
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}
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mips_mode = a->bits;
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ctx->disasm_obj.arch = CPU_LOONGSON_2F;
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ctx->disasm_obj.buffer = bytes;
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ctx->disasm_obj.read_memory_func = &mips_buffer_read_memory;
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ctx->disasm_obj.symbol_at_address_func = &symbol_at_address;
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ctx->disasm_obj.memory_error_func = &memory_error_func;
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ctx->disasm_obj.print_address_func = &generic_print_address_func;
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ctx->disasm_obj.buffer_vma = Offset;
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ctx->disasm_obj.buffer_length = 4;
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ctx->disasm_obj.endian = !a->big_endian;
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ctx->disasm_obj.fprintf_func = &generic_fprintf_func;
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ctx->disasm_obj.stream = stdout;
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op->size = (ctx->disasm_obj.endian == BFD_ENDIAN_LITTLE)
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? print_insn_little_mips((bfd_vma)Offset, &ctx->disasm_obj)
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: print_insn_big_mips((bfd_vma)Offset, &ctx->disasm_obj);
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if (op->size == -1) {
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rz_strbuf_set(&op->buf_asm, "(data)");
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}
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return op->size;
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}
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static int mips_gnu_assemble(RzAsm *a, RzAsmOp *op, const char *str) {
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ut8 *opbuf = (ut8 *)rz_strbuf_get(&op->buf);
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int ret = mips_assemble_opcode(str, a->pc, opbuf);
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if (a->big_endian) {
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ut8 tmp = opbuf[0];
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opbuf[0] = opbuf[3];
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opbuf[3] = tmp;
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tmp = opbuf[1];
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opbuf[1] = opbuf[2];
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opbuf[2] = tmp;
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}
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return ret;
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}
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static bool mips_gnu_init(void **user) {
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MIPSGnuContext *ctx = RZ_NEW0(MIPSGnuContext);
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rz_return_val_if_fail(ctx, false);
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*user = ctx;
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return true;
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}
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static bool mips_gnu_fini(void *user) {
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MIPSGnuContext *ctx = (MIPSGnuContext *)user;
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if (ctx) {
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RZ_FREE(ctx);
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}
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return true;
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}
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RzAsmPlugin rz_asm_plugin_mips_gnu = {
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.name = "mips.gnu",
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.arch = "mips",
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.license = "GPL3",
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.bits = 32 | 64,
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.endian = RZ_SYS_ENDIAN_LITTLE | RZ_SYS_ENDIAN_BIG,
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.desc = "MIPS CPU",
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.init = mips_gnu_init,
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.fini = mips_gnu_fini,
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.disassemble = &mips_gnu_disassemble,
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.assemble = &mips_gnu_assemble
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};
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@ -100,7 +100,7 @@ RUN
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NAME=assembler
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FILE==
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CMDS=<<EOF
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e asm.arch=mips.gnu
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e asm.arch=mips
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e asm.bits=32
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e cfg.bigendian=0
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pa lui t9, 0x41
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@ -122,7 +122,7 @@ RUN
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NAME=with-spaces
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FILE==
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CMDS=<<EOF
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e asm.arch=mips.gnu
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e asm.arch=mips
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e asm.bits=32
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e cfg.bigendian=0
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pa addiu v0, v1, 33
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@ -524,7 +524,7 @@ BROKEN=1
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CMDS=<<EOF
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e io.va=true
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e asm.bits=32
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e asm.arch=mips.gnu
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e asm.arch=mips
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e asm.comments=0
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e analysis.hasnext=1
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e analysis.nopskip=1
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@ -745,11 +745,11 @@ EXPECT=<<EOF
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EOF
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RUN
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NAME=mips.gnu regs
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NAME=mips regs
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FILE==
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BROKEN=1
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CMDS=<<EOF
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e asm.arch=mips.gnu
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e asm.arch=mips
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ar
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EOF
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EXPECT=<<EOF
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@ -1,85 +0,0 @@
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d "add.s $f0, $f0, $f0" 00000046 0x4
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d "addi zero, zero, 0" 00000020 0x4
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d "addiu zero, t0, -25" e7ff0025 0x4
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d "addiu zero, t0, 0" 00000025 0x4
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d "andi zero, zero, 0x0" 00000030 0x4
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d "b 0x00000008" 00000010 0x4
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d "bc0f 0x00000008" 00000041 0x4
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d "bc1f 0x00000008" 00000045 0x4
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d "bc2f 0x00000008" 00000049 0x4
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d "bc3f 0x00000008" 0000004d 0x4
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d "beq t0, s0, 0x0000444c" 11111011 0x4
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d "beql sp, t8, 0x00014008" 0050b853 0x4
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d "beqz t0, 0x00000008" 00000011 0x4
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d "beqzl zero, 0x00000008" 00000050 0x4
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d "bgez v0, 0x00000010" 02004104 0x4
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d "bgezal s1, 0x00000108" 40003106 0x4
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d "bgezall t3, 0x00000128" 48007305 0x4
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d "bgezl t6, 0x00000128" 4800c305 0x4
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d "bgtz zero, 0x00000008" 0000001c 0x4
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d "bgtzl zero, 0x00000008" 0000005c 0x4
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d "blez zero, 0x00000008" 00000018 0x4
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d "blezl zero, 0x00000008" 00000058 0x4
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d "bltz zero, 0x00000008" 00000004 0x4
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d "bltzl s6, 0x00000118" 4400c206 0x4
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d "bne t0, s0, 0x0000440c" 01111015 0x4
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d "bnel s0, s0, 0xffffffffffff4008" 00d01056 0x4
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d "bnez zero, 0x00000008" 00000014 0x4
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d "bnezl t0, 0x00000008" 00000055 0x4
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d "c0 0x0" 00000042 0x4
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d "c1 0x1000000" 00000047 0x4
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d "c2 0x0" 0000004a 0x4
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d "c3 0x0" 0000004e 0x4
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d "cache 0x0, 0(zero)" 000000bc 0x4
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d "daddi zero, zero, 0" 00000060 0x4
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d "daddiu zero, zero, 0" 00000064 0x4
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d "j 0x00000000" 00000008 0x4
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d "jal 0x00000000" 0000000c 0x4
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d "jalx 0x00000000" 00000074 0x4
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d "jalx 0x00000004" 01000074 0x4
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d "lb zero, 0(zero)" 00000080 0x4
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d "lbu zero, 0(zero)" 00000090 0x4
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d "ld zero, 0(zero)" 000000dc 0x4
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d "ldc1 $f0, 0(zero)" 000000d4 0x4
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d "ldc2 $0, 0(zero)" 000000d8 0x4
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d "ldl zero, 0(zero)" 00000068 0x4
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d "ldr zero, 0(zero)" 0000006c 0x4
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d "lh zero, 0(zero)" 00000084 0x4
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d "lhu zero, 0(zero)" 00000094 0x4
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d "li zero, 0" 00000024 0x4
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d "li zero, 0x0" 00000034 0x4
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d "ll zero, 0(zero)" 000000c0 0x4
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d "lld zero, 0(zero)" 000000d0 0x4
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d "lui zero, 0x0" 0000003c 0x4
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d "lw zero, 0(zero)" 0000008c 0x4
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d "lwc1 $f0, 0(zero)" 000000c4 0x4
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d "lwc2 $0, 0(zero)" 000000c8 0x4
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d "lwc3 $0, 0(zero)" 000000cc 0x4
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d "lwl zero, 0(zero)" 00000088 0x4
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d "lwr zero, 0(zero)" 00000098 0x4
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d "lwu zero, 0(zero)" 0000009c 0x4
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d "mfc0 zero, $0" 00000040 0x4
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d "mfc1 zero, $f0" 00000044 0x4
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d "mfc2 zero, $0" 00000048 0x4
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d "mfc3 zero, $0" 0000004c 0x4
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d "nop" 00000000 0x4
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d "ori zero, t0, 0x0" 00000035 0x4
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d "paddsh $f0, $f0, $f0" 0000004b 0x4
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d "sb zero, 0(zero)" 000000a0 0x4
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d "sc zero, 0(zero)" 000000e0 0x4
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d "scd zero, 0(zero)" 000000f0 0x4
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d "sd zero, 0(zero)" 000000fc 0x4
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d "sdc1 $f0, 0(zero)" 000000f4 0x4
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d "sdc2 $0, 0(zero)" 000000f8 0x4
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d "sdl zero, 0(zero)" 000000b0 0x4
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d "sdr zero, 0(zero)" 000000b4 0x4
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d "sh zero, 0(zero)" 000000a4 0x4
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d "slti zero, zero, 0" 00000028 0x4
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d "sltiu zero, zero, 0" 0000002c 0x4
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d "sw zero, 0(zero)" 000000ac 0x4
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d "swc1 $f0, 0(zero)" 000000e4 0x4
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d "swc2 $0, 0(zero)" 000000e8 0x4
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d "swc3 $0, 0(zero)" 000000ec 0x4
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d "swl zero, 0(zero)" 000000a8 0x4
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d "swr zero, 0(zero)" 000000b8 0x4
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d "xori zero, zero, 0x0" 00000038 0x4
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File diff suppressed because one or more lines are too long
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@ -76,19 +76,19 @@ RUN
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NAME=MIPS new abi
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FILE=bins/elf/analysis/mips64r2-busybox-loongson
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CMDS=<<EOF
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e asm.arch=mips.gnu
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e asm.arch=mips
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e asm.bytes=true
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e cfg.bigendian=false
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s 0x120005978
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pd 6
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EOF
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EXPECT=<<EOF
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0x120005978 1800bfff sd ra, 24(sp)
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0x12000597c 3800a7ff sd a3, 56(sp)
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0x120005980 4000a8ff sd a4, 64(sp)
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0x120005984 4800a9ff sd a5, 72(sp)
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0x120005988 5000aaff sd a6, 80(sp)
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0x12000598c 5800abff sd a7, 88(sp)
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0x120005978 1800bfff sd ra, 0x18(sp)
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0x12000597c 3800a7ff sd a3, 0x38(sp)
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0x120005980 4000a8ff sd t0, 0x40(sp)
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0x120005984 4800a9ff sd t1, 0x48(sp)
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0x120005988 5000aaff sd t2, 0x50(sp)
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0x12000598c 5800abff sd t3, 0x58(sp)
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EOF
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RUN
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