Always register the derived CC from the reg profile ##anal (#17685)

This commit is contained in:
pancake 2020-09-24 17:17:15 +02:00 committed by GitHub
parent 2a0d8fbe59
commit f71ec729ba
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
7 changed files with 38 additions and 9 deletions

View file

@ -759,6 +759,19 @@ R_API void r_core_anal_cc_init(RCore *core) {
sdb_concat_by_path (cc, dbhomepath);
cc->path = strdup (dbhomepath);
}
// same as "tcc `arcc`"
char *s = r_reg_profile_to_cc (core->anal->reg);
if (s) {
if (!r_anal_cc_set (core->anal, s)) {
eprintf ("Warning: Invalid CC from reg profile.\n");
}
free (s);
} else {
eprintf ("Warning: Cannot derive CC from reg profile.\n");
}
if (sdb_isempty (core->anal->sdb_cc)) {
eprintf ("Warning: Missing calling conventions for '%s'. Deriving it from the regprofile.\n", anal_arch);
}
}
static int bin_info(RCore *r, int mode, ut64 laddr) {

View file

@ -688,6 +688,7 @@ static bool cb_asmarch(void *user, void *data) {
r_core_anal_type_init (core);
}
r_core_anal_cc_init (core);
return true;
}

View file

@ -1141,9 +1141,8 @@ R_API int r_main_radare2(int argc, const char **argv) {
}
}
if (mapaddr) {
eprintf ("WARNING: using oba to load the syminfo from different mapaddress.\n");
eprintf ("TODO: Must use the API instead of running commands to speedup loading times.\n");
if (r_config_get_i (r->config, "file.info")) {
eprintf ("Warning: using oba to load the syminfo from different mapaddress.\n");
// load symbols when using r2 -m 0x1000 /bin/ls
r_core_cmdf (r, "oba 0 0x%"PFMT64x, mapaddr);
r_core_cmd0 (r, ".ies*");
@ -1324,6 +1323,7 @@ R_API int r_main_radare2(int argc, const char **argv) {
}
free (global_rc);
}
// only analyze if file contains entrypoint
{
char *s = r_core_cmd_str (r, "ieq");

View file

@ -7,9 +7,10 @@ e asm.bits = 64
afcl
EOF
EXPECT=<<EOF
amd64
ms
amd64
swift
reg
EOF
RUN
@ -70,6 +71,7 @@ e asm.bits = 64
afcl
EOF
EXPECT=<<EOF
reg
arm64
swift
EOF
@ -142,6 +144,7 @@ e asm.bits = 32
afcl
EOF
EXPECT=<<EOF
reg
n32
o32
EOF
@ -152,6 +155,7 @@ FILE=bins/elf/libc.so.0
ARGS=-a mips -b 64
CMDS=afcl
EXPECT=<<EOF
reg
n32
o32
EOF

View file

@ -88,9 +88,10 @@ tcc `arcc`
afcl
EOF
EXPECT=<<EOF
amd64
ms
amd64
swift
reg
r0 reg(r0, r1, r2, r3)
rdi reg(rdi, rsi, rdx, rcx)
ms

View file

@ -2670,6 +2670,11 @@ EXPECT=<<EOF
"cc.optlink.argn=stack",
"cc.optlink.ret=eax",
"cc.pascal.argn=stack_rev",
"cc.reg.arg0=eax",
"cc.reg.arg1=ebx",
"cc.reg.arg2=ecx",
"cc.reg.arg3=edx",
"cc.reg.ret=eax",
"cc.stdcall.argn=stack",
"cc.stdcall.ret=eax",
"cc.watcom.arg0=eax",
@ -2683,6 +2688,7 @@ EXPECT=<<EOF
"fastcall=cc",
"optlink=cc",
"pascal=cc",
"reg=cc",
"stdcall=cc",
"watcom=cc",
"zigns",

View file

@ -6,9 +6,10 @@ tcc-*
tcc
EOF
EXPECT=<<EOF
amd64
ms
amd64
swift
reg
EOF
RUN
@ -16,9 +17,10 @@ NAME=tcc
FILE=bins/elf/ls
CMDS=tcc
EXPECT=<<EOF
amd64
ms
amd64
swift
reg
EOF
RUN
@ -30,13 +32,15 @@ tccl
tcc*
EOF
EXPECT=<<EOF
["rax amd64 (rdi, rsi, rdx, rcx, r8, r9, xmm0, xmm1, xmm2, xmm3, xmm4);","rax ms (rcx, rdx, r8, r9, stack);","rax swift (rdi, rsi, rdx, rcx, r8, r9, xmm0, xmm1, xmm2, xmm3, xmm4, r13, r12);"]
rax amd64 (rdi, rsi, rdx, rcx, r8, r9, xmm0, xmm1, xmm2, xmm3, xmm4);
["rax ms (rcx, rdx, r8, r9, stack);","rax amd64 (rdi, rsi, rdx, rcx, r8, r9, xmm0, xmm1, xmm2, xmm3, xmm4);","rax swift (rdi, rsi, rdx, rcx, r8, r9, xmm0, xmm1, xmm2, xmm3, xmm4, r13, r12);","rdi reg (rdi, rsi, rdx, rcx);"]
rax ms (rcx, rdx, r8, r9, stack);
rax amd64 (rdi, rsi, rdx, rcx, r8, r9, xmm0, xmm1, xmm2, xmm3, xmm4);
rax swift (rdi, rsi, rdx, rcx, r8, r9, xmm0, xmm1, xmm2, xmm3, xmm4, r13, r12);
tfc rax amd64 (rdi, rsi, rdx, rcx, r8, r9, xmm0, xmm1, xmm2, xmm3, xmm4);
rdi reg (rdi, rsi, rdx, rcx);
tfc rax ms (rcx, rdx, r8, r9, stack);
tfc rax amd64 (rdi, rsi, rdx, rcx, r8, r9, xmm0, xmm1, xmm2, xmm3, xmm4);
tfc rax swift (rdi, rsi, rdx, rcx, r8, r9, xmm0, xmm1, xmm2, xmm3, xmm4, r13, r12);
tfc rdi reg (rdi, rsi, rdx, rcx);
EOF
RUN