* Add tests for pointer write command `*`
Some test cases override `asm.arch` for bitness compatibility reasons.
* Refactor pointer write command `*` to use the API
* Allow use of more general exprs as value for pointer write command `*` ##shell
* Instead of detecting when to write a value, and write a hexpair
otherwise, do the inverse: detect when to write a hexpair, and write a
value otherwise. This allows more general value exprs such as
variables, derefs, ...
* To enable this, add an option to `rz_hex_str_is_valid` so it can
reject a 0x-prefixed string (because 0x-prefixed strings should be
handled as values, not hexpairs, by the pointer write command)
* Add a test case to ensure a non-0x-prefixed value arg, that's not a
valid hexpair, now gets eval'ed as an expr by the pointer write
command (where previously it would throw an error)
* Add test for pointer read command `*`
Test for `asm.bits=8` uses `asm.arch=6502` because `asm.bits=8` is
unsupported for the default arch.
* Fix pointer command `*` broken since move from `?` to `%` ##shell
* Refactor to use appropriate existing API in `num_callback`
- `RZ_PROJECT_VERSION` 14
- Add `RzCallable`.has_unspecified_parameters
- Add `RzAnalysis`.debug_info
- Add `RzAnalysisVarStorageType` composite and `eval` `pending`
- Support for parse DWARF section "debug_loclists", "debug_ranges", "debug_rnglists"
- Partial support for eval DWARF expr_loc
- Support for anonymous Type, function variable, struct member
- Cache all DWARF information in `RzAnalysisDebugInfo` and remove `SDB` based caching.
- Add arm32, arm64, TriCore DWARF register name
- Fix same name basetype
'rizin' is missing a lot of syscalls for i.e. arm. We can check that
with:
rizin -a x86_64 -b 64 -k linux -q -c asl
vs
rizin -a arm -b 64 -k linux -q -c asl
'rz_syscall_item_new_from_string' splits the incoming string by commas
and expects at least 3 items as a result. This patch fixes
syscall preprocessing by appending empty strings to match the expected
number of items after a split.
This is a clone of a fix posted to radare2 [1].
[1] https://github.com/radareorg/radare2/pull/21508
+ Switch the member imports in RzBinPlugin from RzList to RzPVector
+ Also switch the member imports in RzBinObject from RzList to RzPVector to meet the refactor of RzBinPlugin
+ Modify the traverse and invocation related to the aforementioned changes
+ Remove the deprecated API rz_bin_get_imports
* Apply relocations, jump tables are detected correctly now
* Use virtual files for patching and relocation targets
* Create continous sections where possible instead of a section per page
* Support for DOS extender bound LE executables
* Support page compression of type 1 (iterated) and 5 (compressed)
* Add support for 16 bit relocations
* Fix numerous issues, leaks, UB, etc
OpenBSD enables arm64 BTI or Intel IBT by default, except when the
binary was linked with -Wl,-z,nobtcfi in order to opt-out. In this case,
a PT_OPENBSD_NOBTCFI segment will exist, which we can indicate in the
bin info.
See also https://undeadly.org/cgi?action=article;sid=20230714121907
Original Commit: 4551bf03461595a9645051347ad026974227ac6d
Co-authored-by: pancake <pancake@nopcode.org>
* Export float basic op to op_builder header
* Basic vmov with note and question
* Add vmov for immediate
* Add vmov for NEON and VFP
* Add vmsr, vmrs. shared instruction of vfp and neon done
* Add vector logical operations for arm32 il
* Add vmvn for arm32 il
* Solve op builder for rzil float
* Add vector compare instructions (vceq/vcge/vcle/vcgt/vclt, and abs version)
* Rename vcmp to vec_cmp to avoid conflict with VCMP instruction
* Add vtst of NEON instruction set
* Fix FEQ
* Discard unecessary changes
* Add vldn for multiple n-elements
* Add vldn for single-lane and all-lane
* Add vstn
* Add vcvt for float-integer and float-float
* Check codeql warning
* Add vdup
* Fix according to reviewer
* Add vext
* Add vzip
* Fix reg_bits shadowing
* Add vuzp
* Init some eff as EMPTY for loop-seq
* Add vswap
* Add vadd and vsub
* Add vmul for float point in vfp
* Fix test_validate_forder
* Fix reg binding by add missing reg(fpscr)
* Fix memory broken caused by misuse of REG_VAL and others
* Add vldr and vstr
* Fix some bug in rzil float
* Fix a format typo bug in rzfloat
* Add rzil emulateme test for vfp
* Fix fpscr in db arm32 related tests
* Add extra argument info in vfp test
* Remove duplicated macro of float
/wi was falling through the switch case and it was not accepting the
input correctly. Fix this by breaking at the end of the '/w' case so
that the search can begin.
rz_buf_read_at() with a negative addr on a ref (slice) buffer broke all
subsequent calls to rz_buf_read_at(). This is fixed by making sure to
always reset to the initial seek.
This bug was detected through xnu kernelcaches, where we may also skip
any obviously invalid read.
For bind chained fixups (pointing to imports parsed in the previous
commit) we reuse the patching code for classic relocs as the logic is
more generic here than for local chained fixups.
The LC_DYLD_CHAINED_FIXUPS load command references a new kind of imports
table that is used for binding chained fixups. A similar table may be
reconstructed from the legacy BIND_OPCODE_THREADED info. We now display
these new imports in `ii` instead of the classic undefined symbols and
use them to assign names to relocs.
Objective-C superclass resolution for chained fixups is also changed to
first check for relocs and then for a non-zero address read from memory
instead of ignoring relocs entirely when there is a non-zero value in
memory (this did not work for chained fixups as those already have
non-zero values before patching).
Chained fixups are essentially a new kind of relocs, so it makes sense
to also represent them as RzBinRelocs. Currently the results are
sometimes less meaningful than the reloc info that was parsed before
from indirectsyms in such cases, as chained imports are not parsed yet
and thus the target symbols of bind relocs are not yet known, hence the
temporarily BROKEN tests.
