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12035 commits 1 branch 31 tags 178 MiB
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1019 commits

Author SHA1 Message Date
pancake
3654e5f33b Fix regression in reg.type=flg 2016-08-14 19:12:52 +02:00
Alexandru Caciulescu
138c69f98f Fix flag regs being seen as 'gpr' instead of 'flg' 2016-08-14 02:24:02 +02:00
Álvaro Felipe Melchor
dc5673ec3a Fix regression with the arm/thumb changes (#5464) 
Now we build a list of ranges (RAnalRange) based on anal hints to handle the
bits in a better way in the case of arm/thumb

Now instead of asm.bits that rules the whole binary we can define ranges with
anal hints
 2016-08-10 18:49:44 +02:00
pancake
9902a5fc67 Detect local variables in Dalvik code analysis 2016-08-05 02:40:52 +02:00
@bezjaje
9a9df6c3b7 ESIL: small x86-16 improvements (#5443) 
+ LODSB and LODSW are compatible with 16-bits by using the proper size for 'si' register
+ added ss, ds, es segments to 16-bits register profile
 2016-08-04 23:54:39 +02:00
pancake
f840836af8 Add aad command to analyze data refs as code (LEA) 2016-08-04 22:52:33 +02:00
Lev Aronsky
913df9b74c Added a missing comma in ESIL parsing of a memory destination with arithmetics involved, fixes #5431 (#5440) 2016-08-04 11:24:04 +02:00
pancake
f883a00741 Fix some more arm-rel-pc issues (by CalArcher) 2016-08-01 14:49:42 +02:00
Ahmed Mohamed Abd El-MAwgood
2dbb3d8fc6 Calling convention profiles in SDB (#5358) 2016-07-27 13:50:14 +02:00
pancake
085a156a86 Fix #5334 - add support to analyze interrupt handler functions 2016-07-25 20:15:50 +02:00
pancake
91fe80f4ca Fix avr's rjmp disasm, analysis and esil 2016-07-25 03:19:16 +02:00
Maijin
22de895ef5 Rename CSR disasm/anal into XAP4 Fix #5355 2016-07-23 00:41:42 +02:00
Maijin
c274afe748 Fix #3286 - Use stdbool.h 2016-07-12 22:15:19 +02:00
pancake
48b44e8488 Fix #5271 - Support capstone3 again 2016-07-05 18:33:04 +02:00
pancake
a81d667b53 Fix avr esil string 2016-07-04 16:12:28 +02:00
pancake
f4f26582c7 Fix RSP esil warnings 2016-07-04 14:38:35 +02:00
bsmiles32
622e828e1d Add basic support for N64 RSP processor. (#5269) 
* Add basic support for N64 RSP processor.
This includes:
* a table driven instruction decoder (rsp_idec)
* a disassembler
* a very primitive anal plugin
 2016-07-03 22:03:26 +02:00
pancake
2cc433cefa Fixes for avr to make travis green 2016-07-02 02:37:00 +02:00
pancake
9864ef8841 Lowercase all registers to match RReg rules in AVR 2016-07-01 15:22:23 +02:00
pancake
9447bfa9b9 Fix analysis and add ESIL for avr's rjmp 2016-07-01 15:07:52 +02:00
pancake
98e90dd3cf Implement RSyscall.IO in disasm loop for X86 and AVR 2016-06-29 17:02:43 +02:00
pancake
c3bfbcd66d Fix anal.arm.cs crash for 32bit 2016-06-29 14:24:22 +02:00
Álvaro Felipe Melchor
4b08d38cb1 more mem leak fixes 2016-06-29 10:11:25 +02:00
condret
1aa3b6bf75 fix #4420, fix #4423 and refix #4422 (#5215) 2016-06-25 20:37:02 +02:00
condret
2b0124100a fix #4432 (#5212) 2016-06-25 19:17:12 +02:00
condret
b8f26d248b fix #4422 (#5203) 2016-06-25 03:36:53 +02:00
Ahmed Mohamed Abd El-MAwgood
3bac42eda7 Improving variables on ARM (16, 32, 64) (#5146) 
removing argument detection extension used in af now args are seperately detected by afCa
aa = af + afCa
using aliases as well as real registers
rewritten varsub
Fixing some of Arm esil and optimizing them for arg/var detection
 2016-06-20 15:22:09 +02:00
pancake
bfa8eb740a Optimize callconv and fix two bugs related to op_pos 2016-06-17 18:38:25 +02:00
pancake
fb3be2c58f Do not nullify RAnalOp after fini() 2016-06-17 15:52:57 +02:00
pancake
1629dd2b64 Remove two unused fields in RAnalOp and some deadcode 2016-06-17 14:26:24 +02:00
Lev Aronsky
db8414d186 Fixed order of arguments in ESIL representation of MUL. 2016-06-16 22:33:16 +02:00
pancake
5c14841299 Support op->family and some op->cycle for anal.arm64 2016-06-16 01:43:41 +02:00
pancake
1bb7efd76c Some more COV checks in socket.run 2016-06-14 04:00:30 +02:00
pancake
ed06c5bcb6 Fix arm64 analysis issue 2016-06-14 00:13:04 +02:00
pancake
e935aca270 Set esil->address before calling esil.parse 2016-06-13 15:05:48 +02:00
pancake
c883c0354f Simplify some arm esil expressions 2016-06-13 11:57:21 +02:00
pancake
3861032686 LDR PC is considered UJMP 2016-06-13 11:31:08 +02:00
pancake
3d9bea75ab Fixing some ARM regressions 2016-06-13 10:13:28 +02:00
pancake
b829244c19 Fixes for thumb/arm string references and endian refptr 2016-06-12 23:42:37 +02:00
pancake
0845add4cf Implement relocs for ELF-powerpc 2016-06-07 00:12:45 +02:00
pancake
eb9feef231 Fixes for powerpc endian in mach0 and other issues 2016-06-06 22:57:22 +02:00
pancake
c04b32e6aa Fix GCC warning in anal.gb 2016-06-06 16:06:57 +02:00
pancake
d3394d5a7a Fix latest 28 COVs 2016-06-02 03:19:31 +02:00
pancake
95b2e511f5 Fix some warnings 2016-06-01 12:23:10 +02:00
pancake
16d0396b8f Fix /A, add MJMP optype, and op.reg for UJMP 2016-05-30 00:38:35 +02:00
Álvaro Felipe Melchor
c1d2e0223e Fix #5037 
oob write in anal_x86_cs.c
 2016-05-29 21:51:41 +02:00
Sushant Dinesh
f5ca358aee Fixes x86 to ESIL lifting memory operands (#5029) 
Closes #5027
Closes #4431
 2016-05-29 12:11:04 +02:00
pancake
78a26275e1 Monitor opcodes are not traps in dalvik 2016-05-29 01:35:41 +02:00
Sushant
86b19bf7df Fixes esil mips signed compare 2016-05-27 15:56:20 +05:30
Sushant Dinesh
2adcea4a85 Esil internal set (#5012) 
* Generalizes set/unset

- This commit makes set/unset more generic by allowing any value to be assigned
to a register (as opposed to just 0/1 before) without any side effects.
- $[0-9]* represents a value to be set, in decimal representation, without
having any side effects of changing esil vars old, cur and lastsz and hence
not affecting the flag computations. Example: Set rax to 100. ("$100,rax,=").
 2016-05-26 16:56:46 +02:00