Duncan Ogilvie
18ffea18cc
added/fixed various cmovXX opcodes ( #5033 )
...
As per the Intel manual:
```
CMOVcc - Conditional Move:
| Opcode | Instruction | Op/En| 64-Bit Mode| Compat/Leg Mode| Description
| 0F 47 /r | CMOVA r16, r/m16 | RM | Valid | Valid | Move if above (CF=0 and ZF=0).
| REX.W + 0F 43 /r| CMOVAE r64, r/m64 | RM | Valid | N.E. | Move if above or equal (CF=0).
| 0F 42 /r | CMOVB r16, r/m16 | RM | Valid | Valid | Move if below (CF=1).
| REX.W + 0F 46 /r| CMOVBE r64, r/m64 | RM | Valid | N.E. | Move if below or equal (CF=1 or ZF=1).
| 0F 42 /r | CMOVC r16, r/m16 | RM | Valid | Valid | Move if carry (CF=1).
| REX.W + 0F 44 /r| CMOVE r64, r/m64 | RM | Valid | N.E. | Move if equal (ZF=1).
| 0F 4F /r | CMOVG r16, r/m16 | RM | Valid | Valid | Move if greater (ZF=0 and SF=OF).
| REX.W + 0F 4D /r| CMOVGE r64, r/m64 | RM | Valid | N.E. | Move if greater or equal (SF=OF).
| 0F 4C /r | CMOVL r16, r/m16 | RM | Valid | Valid | Move if less (SF!= OF).
| REX.W + 0F 4E /r| CMOVLE r64, r/m64 | RM | Valid | N.E. | Move if less or equal (ZF=1 or SF!= OF).
| 0F 46 /r | CMOVNA r16, r/m16 | RM | Valid | Valid | Move if not above (CF=1 or ZF=1).
| REX.W + 0F 42 /r| CMOVNAE r64, r/m64| RM | Valid | N.E. | Move if not above or equal (CF=1).
| 0F 43 /r | CMOVNB r16, r/m16 | RM | Valid | Valid | Move if not below (CF=0).
| REX.W + 0F 47 /r| CMOVNBE r64, r/m64| RM | Valid | N.E. | Move if not below or equal (CF=0 and
| | | | | | ZF=0).
| 0F 43 /r | CMOVNC r16, r/m16 | RM | Valid | Valid | Move if not carry (CF=0).
| REX.W + 0F 45 /r| CMOVNE r64, r/m64 | RM | Valid | N.E. | Move if not equal (ZF=0).
| 0F 4E /r | CMOVNG r16, r/m16 | RM | Valid | Valid | Move if not greater (ZF=1 or SF!= OF).
| REX.W + 0F 4C /r| CMOVNGE r64, r/m64| RM | Valid | N.E. | Move if not greater or equal (SF!= OF).
| 0F 4D /r | CMOVNL r16, r/m16 | RM | Valid | Valid | Move if not less (SF=OF).
| REX.W + 0F 4F /r| CMOVNLE r64, r/m64| RM | Valid | N.E. | Move if not less or equal (ZF=0 and
| | | | | | SF=OF).
| 0F 41 /r | CMOVNO r16, r/m16 | RM | Valid | Valid | Move if not overflow (OF=0).
| REX.W + 0F 4B /r| CMOVNP r64, r/m64 | RM | Valid | N.E. | Move if not parity (PF=0).
| 0F 49 /r | CMOVNS r16, r/m16 | RM | Valid | Valid | Move if not sign (SF=0).
| REX.W + 0F 45 /r| CMOVNZ r64, r/m64 | RM | Valid | N.E. | Move if not zero (ZF=0).
| 0F 40 /r | CMOVO r16, r/m16 | RM | Valid | Valid | Move if overflow (OF=1).
| REX.W + 0F 4A /r| CMOVP r64, r/m64 | RM | Valid | N.E. | Move if parity (PF=1).
| 0F 4A /r | CMOVPE r16, r/m16 | RM | Valid | Valid | Move if parity even (PF=1).
| REX.W + 0F 4B /r| CMOVPO r64, r/m64 | RM | Valid | N.E. | Move if parity odd (PF=0).
| 0F 48 /r | CMOVS r16, r/m16 | RM | Valid | Valid | Move if sign (SF=1).
| REX.W + 0F 44 /r| CMOVZ r64, r/m64 | RM | Valid | N.E. | Move if zero (ZF=1).
```
* fixed typo
* or -> nor
2016-05-30 04:20:19 +02:00
pancake
0f271a8bac
* Added api to get opcode descriptions
...
- r_asm now depends on r_db (uses r_pair aka sdb)
- r_asm_describe()
- install opcode descriptions
- Use ?d to get description of opcode (uses asm.arch)
* Add 'fl' command to get length of flag
* Fix some warnings in anal.sparc plugin
* Add new assembler directives
- .int8 (alias of .byte)
- .int16 (alias of .short)
- .int32 and .int64
* Fix memory leak in r_core_disasm()
* Add accessors for RAnalFcn.{refs,xrefs,vars,bbs}
- Updated bindings
2011-11-12 01:52:31 +01:00
