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1236 commits

Author SHA1 Message Date
Karol Harasim
d190e0d3c3 Add description for Xtensa instructions 2016-05-31 21:48:18 +02:00
pancake
c64eeaa266 Initial implementation of asm.assembler to select different assembler plugin than the disasm 2016-05-30 18:53:32 +02:00
Duncan Ogilvie
216de66e68 fixed jcc (#5034) 2016-05-30 04:21:02 +02:00
Duncan Ogilvie
021a3ea8b2 Update x86 (#5035) 2016-05-30 04:20:29 +02:00
Duncan Ogilvie
18ffea18cc added/fixed various cmovXX opcodes (#5033) 
As per the Intel manual:

```
CMOVcc - Conditional Move:
| Opcode          | Instruction       | Op/En| 64-Bit Mode| Compat/Leg Mode| Description                            
| 0F 47 /r        | CMOVA r16, r/m16  | RM   | Valid      | Valid          | Move if above (CF=0 and ZF=0).         
| REX.W + 0F 43 /r| CMOVAE r64, r/m64 | RM   | Valid      | N.E.           | Move if above or equal (CF=0).         
| 0F 42 /r        | CMOVB r16, r/m16  | RM   | Valid      | Valid          | Move if below (CF=1).                  
| REX.W + 0F 46 /r| CMOVBE r64, r/m64 | RM   | Valid      | N.E.           | Move if below or equal (CF=1 or ZF=1). 
| 0F 42 /r        | CMOVC r16, r/m16  | RM   | Valid      | Valid          | Move if carry (CF=1).                  
| REX.W + 0F 44 /r| CMOVE r64, r/m64  | RM   | Valid      | N.E.           | Move if equal (ZF=1).                  
| 0F 4F /r        | CMOVG r16, r/m16  | RM   | Valid      | Valid          | Move if greater (ZF=0 and SF=OF).      
| REX.W + 0F 4D /r| CMOVGE r64, r/m64 | RM   | Valid      | N.E.           | Move if greater or equal (SF=OF).      
| 0F 4C /r        | CMOVL r16, r/m16  | RM   | Valid      | Valid          | Move if less (SF!= OF).                 
| REX.W + 0F 4E /r| CMOVLE r64, r/m64 | RM   | Valid      | N.E.           | Move if less or equal (ZF=1 or SF!= OF).
| 0F 46 /r        | CMOVNA r16, r/m16 | RM   | Valid      | Valid          | Move if not above (CF=1 or ZF=1).      
| REX.W + 0F 42 /r| CMOVNAE r64, r/m64| RM   | Valid      | N.E.           | Move if not above or equal (CF=1).     
| 0F 43 /r        | CMOVNB r16, r/m16 | RM   | Valid      | Valid          | Move if not below (CF=0).              
| REX.W + 0F 47 /r| CMOVNBE r64, r/m64| RM   | Valid      | N.E.           | Move if not below or equal (CF=0 and   
|                 |                   |      |            |                | ZF=0).                                 
| 0F 43 /r        | CMOVNC r16, r/m16 | RM   | Valid      | Valid          | Move if not carry (CF=0).              
| REX.W + 0F 45 /r| CMOVNE r64, r/m64 | RM   | Valid      | N.E.           | Move if not equal (ZF=0).              
| 0F 4E /r        | CMOVNG r16, r/m16 | RM   | Valid      | Valid          | Move if not greater (ZF=1 or SF!= OF).  
| REX.W + 0F 4C /r| CMOVNGE r64, r/m64| RM   | Valid      | N.E.           | Move if not greater or equal (SF!= OF). 
| 0F 4D /r        | CMOVNL r16, r/m16 | RM   | Valid      | Valid          | Move if not less (SF=OF).              
| REX.W + 0F 4F /r| CMOVNLE r64, r/m64| RM   | Valid      | N.E.           | Move if not less or equal (ZF=0 and    
|                 |                   |      |            |                | SF=OF).                                
| 0F 41 /r        | CMOVNO r16, r/m16 | RM   | Valid      | Valid          | Move if not overflow (OF=0).           
| REX.W + 0F 4B /r| CMOVNP r64, r/m64 | RM   | Valid      | N.E.           | Move if not parity (PF=0).             
| 0F 49 /r        | CMOVNS r16, r/m16 | RM   | Valid      | Valid          | Move if not sign (SF=0).               
| REX.W + 0F 45 /r| CMOVNZ r64, r/m64 | RM   | Valid      | N.E.           | Move if not zero (ZF=0).               
| 0F 40 /r        | CMOVO r16, r/m16  | RM   | Valid      | Valid          | Move if overflow (OF=1).               
| REX.W + 0F 4A /r| CMOVP r64, r/m64  | RM   | Valid      | N.E.           | Move if parity (PF=1).                 
| 0F 4A /r        | CMOVPE r16, r/m16 | RM   | Valid      | Valid          | Move if parity even (PF=1).            
| REX.W + 0F 4B /r| CMOVPO r64, r/m64 | RM   | Valid      | N.E.           | Move if parity odd (PF=0).             
| 0F 48 /r        | CMOVS r16, r/m16  | RM   | Valid      | Valid          | Move if sign (SF=1).                   
| REX.W + 0F 44 /r| CMOVZ r64, r/m64  | RM   | Valid      | N.E.           | Move if zero (ZF=1).
```

* fixed typo

* or -> nor
 2016-05-30 04:20:19 +02:00
Sven Steinbauer
c58689bae1 Fixes for mov op for nz assembler (#5020) 
A number of fixes and updates to the `mov` command for the nz assembler
including:

* handling of `esp` register in more cases
* able to handle negative offsets for target register both byte and word
* able to handle negative offsets for target with immediate value as
        source, both byte and word
* refactor mov block of code to be more consistent (further work needed)
 2016-05-27 18:11:01 +02:00
Sven Steinbauer
76a4e0ca7a Add support for immediate word for sub (#5006) 
`nz` now generates the correct opcode when using a word as an immediate
in the `sub` instruction with a register + offset as the target

Also adds support for word register offsets and refactors that portion
of the code a little

For 32bit only so far
 2016-05-25 17:22:00 +02:00
jvoisin
4b8af71ef4 Removed a duplicate loopne and loopnz entry 
removed a duplicate `loopne` and `loopnz` entry
 2016-05-25 15:24:13 +02:00
Jeffrey Crowell
2a77791616 add 64bit xchg instruction 
still broken for the special case of xchg (E|R)ax, r(32|64)

but will add that next
 2016-05-24 15:13:37 +00:00
Roman Valls Guimerà
6f66ba9b84 Typo "intro"->"into memory" (#4991) 2016-05-24 16:07:38 +02:00
Anton Kochkov
f6b18bcb56 Fix CID 1356018 2016-05-24 08:54:39 +03:00
Sven Steinbauer
8da8ad740f Cleanup fixes 
* For commit comments and compiler errors
* Fixes for PR comments
* fix some "infer fixes" commits

Signed-off-by: Riccardo Schirone <sirmy15@gmail.com>
 2016-05-23 11:25:44 +02:00
Sven Steinbauer
599b6553e4 Infer fixes for asm 
Signed-off-by: Riccardo Schirone <sirmy15@gmail.com>
 2016-05-23 11:25:44 +02:00
pancake
7f6029f17c Fix OR x86.nz test 2016-05-18 11:17:26 +02:00
pancake
2fd754a76c Fix #4938 - Implement 'or REG, NUM' in the x86.nz assembler 2016-05-18 10:48:48 +02:00
Riccardo Schirone
5b92204c27 asm/arch/avr: do not print space if there are no operands 2016-05-17 13:18:23 +02:00
pancake
22989f1ce9 Workaround for x86.nz inc [eax] 2016-05-14 10:59:54 +02:00
Sven Steinbauer
074b327c1c Fix #3644 : Add SIB addressing support to nz compiler 2016-05-13 11:45:54 +02:00
pancake
b4bb247791 Add nop for arm64 assembler 2016-05-10 11:22:13 +02:00
Sven Steinbauer
766b9ec4f0 Add support for dword offsets (#4825) 
* Add support for dword offsets to internal assembler

Internal assembler produces incorrect opcodes for offsets that were
greater than a short.

    rasm2 "mov eax, [eax + 1337]"
    8b8039

This adds support for values >127.

    rasm2 "mov eax, [eax + 1337]"
    8b8039050000

producing the same output as the `nasm` assembler.

* Fix support for negative short and dword offsets

Handle negative offsets for `mov` instructions both short and dword
sizes.

* Whitespace fixes

* Remove rogue character

Remove the reogue `:` that got into the code
 2016-05-09 15:25:20 +02:00
Damien Zammit
5e1ad580db build: fix warnings 2016-05-08 12:21:11 +02:00
Sven Steinbauer
7c0b3eb64a Fix #4745 incorrect assembly for x86 mov (#4791) 2016-05-06 16:08:41 +02:00
Damien Zammit
632dccc217 Remove LIL_ENDIAN macro and configure option 
TODO: Remove other endian cruft from:
- hashing algs
- judy
- squashfs
- grub
- tms320

Signed-off-by: Damien Zammit <damien@zamaudio.com>
 2016-05-06 10:21:55 +02:00
Damien Zammit
af0a865d9f WIP - Totally remove host endianness dependence 
- Adds endian aware functions
- Removes references to host endian
- Uses binary detected endianness else tries LE and restricts by RAsmPlugin
- Fixes gdb debugger endianness when debugging BE qemu gdbserver

Signed-off-by: Damien Zammit <damien@zamaudio.com>
 2016-05-04 23:42:17 +10:00
Álvaro Felipe Melchor
149c7567ed improve arm/thumb detection for .so 2016-05-02 23:00:53 +02:00
pancake
1f7db90e41 Priorize keystone plugins and other random changes 2016-05-02 02:46:01 +02:00
pancake
b417da6d4d Add setarch/(from|to).string simplified RAsm APIs 2016-04-29 11:30:38 +02:00
Riccardo Schirone
26fc8f92ef libr: remove some unused variables and functions 2016-04-27 12:59:45 +02:00
pancake
bfc8e5318e More fixes from osx-ppc 2016-04-27 11:27:22 +02:00
pancake
e9dc4ae89e Fix #4695 - no prompt after r2 -qp 2016-04-26 19:11:11 +02:00
kolen
a65ea77725 Fix 'ed' opcode range resulted in overflow 
Should be:
40 41 .. 4a 4b
   maps to
00 01 .. 0a 0b

Was:
3a 3b 3c 3d 3e 3f 40 41 .. 4a 4b
            maps to
fa fb fc fd fe ff 00 01 .. 0a 0b
 2016-04-21 15:33:26 +02:00
Christoph Sarnowski
145688a60a Fix tricore disasm buffer copy function 
- Did not take `memaddr' argument into account, resulting in wrong disassembly.
- Check boundaries
 2016-04-15 15:51:28 +02:00
NaveenBoggarapu
4c04b98b47 few memory leaks fixed 2016-04-13 21:55:48 +02:00
Travis Goodspeed
3ca3b4f534 This patch fixes a bug in which many MSP430 instructions would be mistaken for emulated instructions. 2016-04-12 23:11:14 +02:00
pancake
5ef2b3cc0f Fix many warnings 2016-04-11 12:22:15 +02:00
Alexander Couzens
7c6ec5f146 fix mips forward assembler when using negative offset 
Fix 'Invalid reg name (-0x5c60)' when try to assemble
'lw t9, -0x5c60(gp)'
 2016-04-11 00:58:04 +02:00
pancake
4e0a71c0c3 Fix #4573 - fix oobread in java disassembler 2016-04-10 01:23:18 +02:00
pancake
3f7a70fb7d Fix #4564 - oobread in dalvik disasm+analyzer 2016-04-10 01:12:58 +02:00
pancake
6f4518a247 Fix #4588 - uninit memory in m68k dis 2016-04-10 01:06:16 +02:00
pancake
eb99ec8580 Fix android build 2016-04-07 16:20:29 +02:00
Anton Kochkov
d558dec5b7 Fix CID 1353073 2016-04-05 12:38:34 +03:00
pancake
62195cc005 Fix #4502 - Implement blx for thumb 2016-04-05 00:15:45 +02:00
Anders Kaare
cb2d45e491 fixing m68k branch disasm bug 
16bit displacement must be signed, but were unsigned. I've converted the
branch variants to 8/16/32bit signed casts rather than duplicating the
8bit ISBITSET() special case.
 2016-04-04 21:27:06 +02:00
pancake
e8263655be Fix more memleaks 2016-04-04 00:17:57 +02:00
pancake
9eb63df89f Fix #4502 - Implement blx address for arm32 assembler 2016-04-03 17:35:52 +02:00
Evan Shaw
58328def22 Show absolute offsets for relative branches in SNES disassembly 
This makes the disassembly easier to read.
 2016-04-02 10:02:27 +02:00
Anders Kaare
ff21bb5fbf fixing 6502 analysis 
36e42b33fe broke analysis by introducing a
new enum value. The analysis code didn't switch on the enum but rather
used it directly as an integer, so since the new SNES_OP_IMM has 5 as
its integer value the analysis code would think that the op was 5 bytes
in length.
 2016-03-30 22:08:52 +02:00
Léo Gaspard
353ff45443 Add EBC 'not' instruction decoding 2016-03-29 17:10:04 +02:00
Léo Gaspard
5c8a663e23 Identify external calls for EBC 2016-03-29 01:22:48 +02:00
Léo Gaspard
7595af19e3 Use decode_index32 for EBC calls 2016-03-29 01:22:48 +02:00
Léo Gaspard
ff4bce16db Actually follow UEFI spec for index{32,64} 2016-03-29 01:22:48 +02:00
pancake
d629165ec8 Remove unnecessary = NULL in bin/p/*.c 2016-03-27 23:02:29 +02:00
pancake
9d62ee0ddf Fix m68k.cs disassembler issue, honor asm.cpu in anal.m68k.cs 2016-03-24 16:21:49 +01:00
pancake
a461bbc536 Fix #4304 - asm.filter for m68k 2016-03-22 12:45:05 +01:00
pancake
76fa5bddcf Add missing signature 2016-03-18 17:19:06 +01:00
pancake
446add902f Fix #4345 - Add scas{bwd} for x86.nz 2016-03-18 16:59:47 +01:00
pancake
dc33b03011 Handle movk and movz in the arm64 assembler and pseudo disassembler 2016-03-17 17:26:08 +01:00
pancake
ae32acc5bc Add missing space after commas in m68k 2016-03-15 11:59:19 +01:00
pancake
1c443caccf Fix some COVs in snes disassembler 2016-03-13 21:04:12 +01:00
pancake
526d8d8e63 Fix #4275 - Fix lanai format string warnings 2016-03-13 03:23:54 +01:00
Evan Shaw
36e42b33fe Support 16-bit immediate operands in SNES 
Size for immediate operands depends on the value of the M flag
(for register A) or the X flag (for registers X and Y). A register is
8-bit when its respective flag is set and 16-bit when clear.

These flags can be set or unset independently, so this still isn't quite right
for when one flag is set and the other isn't, but it's an improvement. It's
possible to force a particular instruction to decode correctly by using the
`afh` command.
 2016-03-12 03:06:46 +01:00
oddcoder
966900121d adding bunch of another esil & fixing the bits 2016-03-09 15:32:50 +01:00
oddcoder
888b7d575d fixing bug in goto disassmebly 2016-03-09 12:21:56 +01:00
Álvaro Felipe Melchor
0efdf9cf97 Fix again #4215 2016-03-07 22:17:59 +01:00
pancake
d00beba767 Fix arm.cs thumb thing 2016-03-07 17:06:26 +01:00
pancake
75bf9b233a Fix aat->aap typo and add no-mclass option for x86.arm.cs 2016-03-07 12:31:50 +01:00
pancake
be9d53417e Fix #4215 - Fix disasm of thumb mrs 0, primask 2016-03-07 04:50:06 +01:00
pancake
650e99407b Oops. copypaste error in 6502dis 2016-03-07 04:44:42 +01:00
pancake
8de14dc2b6 Fix #4242 - OOB read in riscv disassembler 2016-03-07 00:21:49 +01:00
pancake
36ce331815 Fix #4239 - oobread in 6502 disassembler 2016-03-06 23:43:07 +01:00
oddcoder
9b21040898 fixing logic error in rcall instruction 
I just misread the operands of the rcall instruction
their is 2 similar types of instruction (naming conveintions used only
by me and mentioned no where in the manual) the N_T where the n operand
is 8 bit and NET_T where the n operand is 11 bit
the rcall looks like the following 1101 1nnn nnnn nnnn which is obviosly
NEX_T
 2016-03-05 19:54:31 +01:00
oddcoder
115c0bd40d fixing OSX Darwin compilation error #4218 2016-03-04 15:20:20 +01:00
oddcoder
599cbcd3c7 attempt to fix scan.converity bugs 
I also hunted 4th illegal memory read
the first 2 bytes of b is always casted to (ut16) type
with out checking if b even contains 2 bytes
now it is handled it correctly
 2016-03-04 00:50:25 +01:00
oddcoder
87b6ada97a Add asm.describe for pic18c 2016-03-03 03:18:03 +01:00
oddcoder
7fe6c6dff2 Adding initial support for PIC18C diassembler 2016-03-02 11:55:22 +01:00
mrdanielps
7fe1d56932 V810: fixes 
* Proper bound checking when decoding.
* Reuse some macros.
* Follow code style guidelines.
 2016-02-28 17:43:40 +01:00
Prasanna Balan
d9f4bce40b MSP430: add support for illegal opcodes 
Before this commit,any illegal opcode would return -1 which
would make r2 use 1 byte as default opcode width.This was
wrong on MSP430 as it uses fixed 2 byte opcodes.Fix this
 2016-02-25 02:58:38 +01:00
pancake
af2f02515f Support and load r_fs plugins 2016-02-21 02:32:28 +01:00
pancake
7c76d45ab7 Fix #4114 - Remove the use of setjmp in xtensa arch 2016-02-20 23:41:23 +01:00
William Robinet
a67adbcbb8 Typos 2016-02-17 13:38:43 +01:00
pancake
f52d3c114c Add missing signature for the lanai disassembler 2016-02-16 23:26:55 +01:00
William Robinet
d3ab5f38aa Remove execution bit from source files 2016-02-16 23:21:46 +01:00
William Robinet
0c7cacc2dc Fix typos 2016-02-16 23:21:24 +01:00
pancake
55eee73c6d Fix #4061 - properly assemble ldr.w thumb instruction 2016-02-16 17:12:37 +01:00
pancake
384cfb1042 Fix last coverities 2016-02-16 02:08:09 +01:00
mrdanielps
d6f49bc54e V810: Implement ESIL 2016-02-16 00:57:42 +01:00
pancake
ce7ca97cb6 Wip fixes for r_strbuf 2016-02-16 00:28:57 +01:00
pancake
fd359e9121 Implement radiff2 -D and optimize r_strbuf 2016-02-15 23:51:20 +01:00
pancake
cdf63617d7 Initial support for LANAI disassembler 2016-02-15 13:27:23 +01:00
pancake
838b254cc8 Fix #4090 - Do not assemble one-arg xors in x86.nz 2016-02-11 07:35:51 -06:00
mrdanielps
8ee43270e8 V810: Add opcode descriptions 2016-02-11 00:13:27 -06:00
evanrichter
7f43919750 add propeller architecture to asm.describe 
source: http://nagasm.org/ASL/Propeller/printedPDF/QuickReference-v15.pdf
 2016-02-10 17:21:08 -05:00
Jonathan Neuschäfer
91c940738c Add opcode descriptions for riscv 2016-02-03 11:29:32 +01:00
Jonathan Neuschäfer
edbb677a79 libr/asm/d/arm: Fix description of ORR opcode 2016-02-03 11:22:13 +01:00
condret
44b06b11de fix something 2016-02-01 14:10:09 +00:00
condret
b1d894ab7b fix some warning 2016-02-01 10:58:36 +00:00
condret
f66e7a4c46 fix #4012 2016-02-01 10:09:20 +00:00
pancake
bb073cf5db Modernize asm/code.c 2016-01-30 03:02:06 +01:00
pancake
b08892dbb3 Fix Tricore warnings and handle in ELF 2016-01-30 02:58:45 +01:00
Kitsu
73f2995d2e Added tms320 description 2016-01-30 02:50:41 +01:00