If the kernel/system where Rizin is currently run does not support
ptrace(PTRACE_GETREGSET, ..., NT_X86_XSTATE, ...), ENODEV is returned by
the kernel. In such cases, we print the error message once and never
execute the ptrace call again, assuming it is not supported.
Signed-off-by: Riccardo Schirone <sirmy15@gmail.com>
* Create `rz_windows.h`
* Move `RzThread` structure definitions to internal header
* Create and use `rz_th_get_user()` API to avoid exposing `RzThread` layout in external header
* Make `rz_th_self()` an IPI
* Use `_wmkdir()` in `rz_sys_mkdir()` on Windows
* Remove unused `winkd_break_read` function
* Remove `RzIORap` definition from `rz_io.h`
* Remove include of `Windows.h` from `rz_types.h`
* Use `rz_windows.h` when necessary
* Remove `RzCoreRtrHost` definition from `rz_core.h`
* Remove `rz_socket.h` include from `rz_core.h`
In practice, dbg.bpsize was always automatically set to
rz_bp_size(core->dbg->bp, core->analysis->bits) whenever the global bits
changed. But this breaks as soon as different bits are needed for where
the breakpoint is supposed to be set vs. the current value of asm.bits
(for example for thumb/arm32).
So this removes the global bpsize and always calculates it for the
specific breakpoint address.
As a sidenote, dbg.bpsize was not even used for manual db (for dcu it
was though).
On thumb/arm, the current analysis->bits value may not be equal to the
bitness of code that a breakpoint is supposed to be set to. This caused
software breakpoints to be created with incorrect data.
Now the bits for an address is queried by bp through a callback instead
of using a global bp->bits value which would usually correspond to the
current seek, but not the breakpoint addr.
* Logic for getting a register by role or name, whichever matches, moved
to RzReg (rz_reg_get_by_role_or_name)
* Removed rz_debug_reg_err() because it's unnecessary
* Added rz_core_reg_getv_by_role_or_name() and
rz_core_reg_aetv_by_role_or_name() to replace rz_debug_reg_get() for
for usage whenever it is not debug-specific.
* Support building for Windows on ARM
* Fix usage of reserved function name on ARM
* Fix architecture dependent `CONTEXT` fields access
* Fixes for debugging on Windows on ARM
* Fix breakpoint behavior on windows on ARM
* Fix register profile when debugging
* Remove `drx` error message if not supported
* Add support for hardware breakpoints
* Disable support for hardware single-stepping
* Fix Windows Message breakpoints on ARM
* Fix software single-stepping on return instruction on ARM
* Consider link register as destination for return instructions
* Fix setting debug bits to 16
* Rename `r12` to `ip` for windows arm register profile
* Remove debug bits hardcoding on windows
* Add 32bit registers to Windows ARM64 register profile
* Fix software step breakpoint alignment when entering thumb mode
* Define `RZ_TEST_ARCH` for `arm` and `arm64`
* Use `StackWalk64` API for backtracing on Windows
* Fix software single-stepping ARM in thumb mode
* Sync `asm.bits` with debugger
* Cleanup windows_debug.c
* Add SPDX for cross-arm64-windows.txt
* Add floating point control register flags
* Fix Windows Arm register profile alignment
* Keep `drx` warning
* Add function to check if a register is a system register
* Only checks for ARM64 system registers as of now
* Check for system registers in ARM64 when printing registers using "dr"
* Does not completely remove the unnecessary register, but removes a
huge number of useless registers printed by "dr"
* Rename `RZ_REG_TYPE_ALL` to `RZ_REG_TYPE_ANY`
* ADd register types for "sys" and "pauth": `RZ_REG_TYPE_SYS` and
`RZ_REG_TYPE_PAUTH` respectively
* Remove `rz_reg_is_system_reg`
* Add `sys` and `pauth` register profiles
* Update debug tests to account for new arenas and register profiles
* REplace "pauth" with "sec" reg profile
* Update integration tests to account for new register profiles: `sys`, `sec`
* Fill `op->reg` for ARM64 `br`/`blr` analysis
* This fixes software single-stepping on `br`/`blr` instructions on ARM64
* Fill `op->reg` for ARM `bx`/`blx` analysis
* This fixes software single-stepping on `bx`/`blx` instructions on ARM
* Set `bx` as `RZ_ANALYSIS_OP_TYPE_RJMP`
* Fill `RzAnalysisValue->type`
* Use only `RzAnalysisValue` in `rz_core_link_stroff()`
* Fill `op->ireg/disp/scale` for ARM `ldr` analysis
* This fixes software single-stepping for `ldr pc` on ARM
* Fix riscv inverted src/dst values for store instructions
* Fix riscv analysis with buffer of size 2
* Add unit tests for `RzAnalysisOp` and `RzAnalysisValue`
Co-authored-by: Giovanni <561184+wargio@users.noreply.github.com>
