NAME=tcc-star
FILE=bins/elf/ls
CMDS=<<EOF
tcc
tcc-*
tcc
EOF
EXPECT=<<EOF
amd64
amd64syscall
ms
reg
swift
EOF
RUN

NAME=tcc
FILE=bins/elf/ls
CMDS=tcc
EXPECT=<<EOF
amd64
amd64syscall
ms
reg
swift
EOF
RUN

NAME=tccj, tccl, tcc* outputs
FILE=bins/elf/ls
CMDS=<<EOF
tccj
tccl
tcc*
EOF
EXPECT=<<EOF
[{"name":"amd64","ret":"rax","args":["rdi","rsi","rdx","rcx","r8","r9","xmm0","xmm1","xmm2","xmm3","xmm4"]},{"name":"amd64syscall","ret":"rax","args":["rdi","rsi","rdx","r10","r8","r9"]},{"name":"ms","ret":"rax","args":["rcx","rdx","r8","r9"]},{"name":"reg","ret":"rdi","args":["rdi","rsi","rdx","rcx"]},{"name":"swift","ret":"rax","args":["rdi","rsi","rdx","rcx","r8","r9","xmm0","xmm1","xmm2","xmm3","xmm4"],"self":"r13","error":"r12"}]
rax amd64 (rdi, rsi, rdx, rcx, r8, r9, xmm0, xmm1, xmm2, xmm3, xmm4);
rax amd64syscall (rdi, rsi, rdx, r10, r8, r9);
rax ms (rcx, rdx, r8, r9, stack);
rdi reg (rdi, rsi, rdx, rcx);
rax r13.swift (rdi, rsi, rdx, rcx, r8, r9, xmm0, xmm1, xmm2, xmm3, xmm4) r12;
tcc "rax amd64 (rdi, rsi, rdx, rcx, r8, r9, xmm0, xmm1, xmm2, xmm3, xmm4);"
tcc "rax amd64syscall (rdi, rsi, rdx, r10, r8, r9);"
tcc "rax ms (rcx, rdx, r8, r9, stack);"
tcc "rdi reg (rdi, rsi, rdx, rcx);"
tcc "rax r13.swift (rdi, rsi, rdx, rcx, r8, r9, xmm0, xmm1, xmm2, xmm3, xmm4) r12;"
EOF
RUN

NAME=tcc
FILE==
CMDS=<<EOF
e asm.arch=x86
e asm.bits=32
?e 1
tcc "eax jeje(ebx, ecx)"
tcc jeje
tcc- jeje
?e 2
tcc "eax    jeje(ebx, ecx)"
tcc   jeje
tcc- jeje
?e 3
tcc "eax  jeje   (ebx, ecx)"
tcc   jeje
tcc- jeje
?e 4
tcc "eax  jeje   (ebx, ecx)"
tcc jeje
tcc- jeje
?e 5
tcc "  eax  jeje   ( ebx, ecx )"
tcc jeje
tcc- jeje
?e 6
tcc "   eax  jeje   ( 	ebx  ,  ecx  )"
tcc jeje
tcc- jeje
EOF
EXPECT=<<EOF
1
eax jeje (ebx, ecx);
2
eax jeje (ebx, ecx);
3
eax jeje (ebx, ecx);
4
eax jeje (ebx, ecx);
5
eax jeje (ebx, ecx);
6
eax jeje (ebx, ecx);
EOF
RUN