29b04fa460
* added breakpoints and stepping * add link register to allow single-stepping a ret instruction, fix stacktraces * refactor to avoid passing the IO layer structs to the breakpoint function * add tests, refine the stacktrace to not include non-function * add register information for core file parsing * core file generation for RISC-V * make tests run under riscv-64 * make tests run under riscv-32
51 lines
1.2 KiB
C
51 lines
1.2 KiB
C
// SPDX-FileCopyrightText: 2024-2026 mostafa <ubermenchun@gmail.com>
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// SPDX-License-Identifier: BSD-3-Clause
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return rz_str_dup(
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"=PC pc\n"
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"=LR x1\n"
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"=SP x2\n"
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"=BP x8\n" // s0/fp (frame pointer)
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"=R0 x10\n" // a0
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"=R1 x11\n" // a1
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"=A0 x10\n"
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"=A1 x11\n"
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"=A2 x12\n"
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"=A3 x13\n"
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"=A4 x14\n"
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"=A5 x15\n"
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"=A6 x16\n"
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"=A7 x17\n"
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"gpr pc .32 0 0\n"
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"gpr x1 .32 4 0\n" // ra
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"gpr x2 .32 8 0\n" // sp
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"gpr x3 .32 12 0\n" // gp
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"gpr x4 .32 16 0\n" // tp
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"gpr x5 .32 20 0\n" // t0
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"gpr x6 .32 24 0\n" // t1
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"gpr x7 .32 28 0\n" // t2
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"gpr x8 .32 32 0\n" // s0 / fp
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"gpr x9 .32 36 0\n" // s1
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"gpr x10 .32 40 0\n" // a0
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"gpr x11 .32 44 0\n" // a1
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"gpr x12 .32 48 0\n" // a2
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"gpr x13 .32 52 0\n" // a3
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"gpr x14 .32 56 0\n" // a4
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"gpr x15 .32 60 0\n" // a5
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"gpr x16 .32 64 0\n" // a6
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"gpr x17 .32 68 0\n" // a7
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"gpr x18 .32 72 0\n" // s2
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"gpr x19 .32 76 0\n" // s3
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"gpr x20 .32 80 0\n" // s4
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"gpr x21 .32 84 0\n" // s5
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"gpr x22 .32 88 0\n" // s6
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"gpr x23 .32 92 0\n" // s7
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"gpr x24 .32 96 0\n" // s8
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"gpr x25 .32 100 0\n" // s9
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"gpr x26 .32 104 0\n" // s10
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"gpr x27 .32 108 0\n" // s11
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"gpr x28 .32 112 0\n" // t3
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"gpr x29 .32 116 0\n" // t4
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"gpr x30 .32 120 0\n" // t5
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"gpr x31 .32 124 0\n" // t6
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);
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