5353b06952
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None of these should be exploitable, but we want to get rid of these unsafe functions.
234 lines
6.1 KiB
C
234 lines
6.1 KiB
C
// SPDX-FileCopyrightText: 2013-2018 condret <condr3t@protonmail.com>
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// SPDX-FileCopyrightText: 2013-2018 pancake <pancake@nopcode.org>
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// SPDX-License-Identifier: LGPL-3.0-only
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#include <rz_types.h>
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#include <rz_util.h>
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#include <rz_asm.h>
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#include <rz_lib.h>
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#include <stdio.h>
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#include <string.h>
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#include "gb_op_table.h"
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static int gbOpLength(int gboptype) {
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switch (gboptype) {
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case GB_8BIT:
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return 1;
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case GB_8BIT + ARG_8 + GB_IO:
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case GB_8BIT + ARG_8:
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case GB_16BIT:
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return 2;
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case GB_8BIT + ARG_16:
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return 3;
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default:
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return 0;
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}
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}
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static void gb_hardware_register_name(char *reg, size_t reg_sz, ut8 offset) {
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switch (offset) {
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case 0x00: // Joy pad info
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rz_str_ncpy(reg, "rP1", reg_sz);
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break;
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case 0x01: // Serial Transfer Data
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rz_str_ncpy(reg, "rSB", reg_sz);
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break;
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case 0x02: // Serial I/O Control
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rz_str_ncpy(reg, "rSC", reg_sz);
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break;
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case 0x04: // Divider register
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rz_str_ncpy(reg, "rDIV", reg_sz);
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break;
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case 0x05: // Timer Counter
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rz_str_ncpy(reg, "rTIMA", reg_sz);
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break;
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case 0x06: // Timer modulo
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rz_str_ncpy(reg, "rTMA", reg_sz);
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break;
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case 0x07: // Timer control
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rz_str_ncpy(reg, "rTAC", reg_sz);
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break;
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case 0x0f: // Interrupt Flag
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rz_str_ncpy(reg, "rIF", reg_sz);
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break;
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// Audio Channel #1
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case 0x10: // Sweep Register
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rz_str_ncpy(reg, "rAUD1SWEEP", reg_sz);
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break;
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case 0x11: // Sound length/Wave pattern duty
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rz_str_ncpy(reg, "rAUD1LEN", reg_sz);
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break;
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case 0x12: // Envelope
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rz_str_ncpy(reg, "rAUD1ENV", reg_sz);
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break;
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case 0x13: // Frequency low
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rz_str_ncpy(reg, "rAUD1LOW", reg_sz);
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break;
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case 0x14: // Frequency high
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rz_str_ncpy(reg, "rAUD1HIGH", reg_sz);
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break;
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// Audio Channel #2
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case 0x16: // Sound length/Wave pattern duty
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rz_str_ncpy(reg, "rAUD2LEN", reg_sz);
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break;
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case 0x17: // Envelope
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rz_str_ncpy(reg, "rAUD2ENV", reg_sz);
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break;
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case 0x18: // Frequency low
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rz_str_ncpy(reg, "rAUD2LOW", reg_sz);
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break;
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case 0x19: // Frequency high
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rz_str_ncpy(reg, "rAUD2HIGH", reg_sz);
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break;
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// Sound Channel #3
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case 0x1a: // Sound on/off
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rz_str_ncpy(reg, "rAUD3ENA", reg_sz);
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break;
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case 0x1b: // Sound length
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rz_str_ncpy(reg, "rAUD3LEN", reg_sz);
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break;
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case 0x1c: // Select output level
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rz_str_ncpy(reg, "rAUD3LEVEL", reg_sz);
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break;
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case 0x1d: // Frequency low
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rz_str_ncpy(reg, "rAUD3LOW", reg_sz);
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break;
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case 0x1e: // Frequency high
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rz_str_ncpy(reg, "rAUD3HIGH", reg_sz);
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break;
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// Sound Channel #4
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case 0x20: // Sound length
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rz_str_ncpy(reg, "rAUD4LEN", reg_sz);
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break;
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case 0x21: // Envelope
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rz_str_ncpy(reg, "rAUD4ENV", reg_sz);
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break;
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case 0x22: // Polynomial counter
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rz_str_ncpy(reg, "rAUD4POLY", reg_sz);
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break;
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// Sound (general)
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case 0x23:
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rz_str_ncpy(reg, "rAUD4GO", reg_sz);
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break;
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case 0x24: // Channel control / ON-OFF / Volume
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rz_str_ncpy(reg, "rAUDVOL", reg_sz);
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break;
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case 0x25: // Selection of Sound output terminal
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rz_str_ncpy(reg, "rAUDTERM", reg_sz);
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break;
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case 0x26: // Sound on/off
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rz_str_ncpy(reg, "rAUDENA", reg_sz);
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break;
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case 0x76: // Sound Channel 1&2 PCM amplitude
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rz_str_ncpy(reg, "rPCM12", reg_sz);
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break;
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case 0x77: // Sound Channel 3&4 PCM amplitude
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rz_str_ncpy(reg, "rPCM34", reg_sz);
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break;
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case 0x40: // LCD Control
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rz_str_ncpy(reg, "rLCDC", reg_sz);
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break;
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case 0x41: // LCD Status
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rz_str_ncpy(reg, "rSTAT", reg_sz);
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break;
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case 0x42: // Scroll Y
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rz_str_ncpy(reg, "rSCY", reg_sz);
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break;
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case 0x43: // Scroll X
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rz_str_ncpy(reg, "rSCX", reg_sz);
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break;
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case 0x44: // Y-Coordinate
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rz_str_ncpy(reg, "rLY", reg_sz);
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break;
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case 0x45: // Y-Coordinate Compare
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rz_str_ncpy(reg, "rLYC", reg_sz);
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break;
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case 0x46: // Transfer and Start Address
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rz_str_ncpy(reg, "rDMA", reg_sz);
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break;
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case 0x47: // BG Palette Data
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rz_str_ncpy(reg, "rBGP", reg_sz);
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break;
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case 0x48: // Object Palette 0 Data
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rz_str_ncpy(reg, "rOBP0", reg_sz);
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break;
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case 0x49: // Object Palette 1 Data
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rz_str_ncpy(reg, "rOBP1", reg_sz);
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break;
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case 0x4a: // Window Y Position
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rz_str_ncpy(reg, "rWY", reg_sz);
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break;
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case 0x4b: // Window X Position
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rz_str_ncpy(reg, "rWX", reg_sz);
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break;
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case 0x4d: // Select CPU Speed
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rz_str_ncpy(reg, "rKEY1", reg_sz);
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break;
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case 0x4f: // Select Video RAM Bank
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rz_str_ncpy(reg, "rVBK", reg_sz);
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break;
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case 0x51: // Horizontal Blanking, General Purpose DMA
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case 0x52: // Horizontal Blanking, General Purpose DMA
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case 0x53: // Horizontal Blanking, General Purpose DMA
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case 0x54: // Horizontal Blanking, General Purpose DMA
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case 0x55: // Horizontal Blanking, General Purpose DMA
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snprintf(reg, reg_sz, "rHDMA%d", offset - 0x50);
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break;
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case 0x56: // Infrared Communications Port
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rz_str_ncpy(reg, "rRP", reg_sz);
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break;
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case 0x68: // Background Color Palette Specification
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rz_str_ncpy(reg, "rBCPS", reg_sz);
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break;
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case 0x69: // Background Color Palette Data
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rz_str_ncpy(reg, "rBCPD", reg_sz);
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break;
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case 0x6a: // Object Color Palette Specification
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rz_str_ncpy(reg, "rOCPS", reg_sz);
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break;
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case 0x6b: // Object Color Palette Data
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rz_str_ncpy(reg, "rOCPD", reg_sz);
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break;
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case 0x70: // Select Main RAM Bank
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rz_str_ncpy(reg, "rSVBK", reg_sz);
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break;
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case 0xff: // Interrupt Enable Flag
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rz_str_ncpy(reg, "rIE", reg_sz);
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break;
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default:
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// If unknown, return the original address
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snprintf(reg, reg_sz, "0xff%02x", (unsigned int)offset);
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break;
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}
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}
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RZ_IPI int gbDisass(RzAsmOp *op, const ut8 *buf, int len) {
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int foo = gbOpLength(gb_op[buf[0]].type);
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if (len < foo) {
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return 0;
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}
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char reg[32];
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memset(reg, '\0', sizeof(reg));
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switch (gb_op[buf[0]].type) {
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case GB_8BIT:
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rz_asm_op_setf_asm(op, "%s", gb_op[buf[0]].name);
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break;
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case GB_16BIT:
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rz_asm_op_setf_asm(op, "%s %s", cb_ops[buf[1] >> 3u], cb_regs[buf[1] & 7u]);
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break;
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case GB_8BIT + ARG_8:
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rz_asm_op_setf_asm(op, gb_op[buf[0]].name, buf[1]);
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break;
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case GB_8BIT + ARG_16:
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rz_asm_op_setf_asm(op, gb_op[buf[0]].name, buf[1] + 0x100 * buf[2]);
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break;
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case GB_8BIT + ARG_8 + GB_IO:
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gb_hardware_register_name(reg, sizeof(reg), buf[1]);
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rz_asm_op_setf_asm(op, gb_op[buf[0]].name, reg);
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break;
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default:
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rz_asm_op_set_asm(op, "invalid");
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break;
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}
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return foo;
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}
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