rizin/test/db/asm
Dhruv Maroo de4a1297a1
Add RzIL for floating-point x86 instructions (#3865)
* Create `il_fp_ops.inc`, for floating-point instructions' IL ops

* Add IL implementation for `FABS`

 * Also add `x86_il_{get,set}_st_reg` helper functions

* Add IL implementation for `FNINIT` and `FLDCW`

* Add IL implementations for `FNSTCW` and `FNSTSW`

* Add IL implementation for `FNCLEX`

* Add ST push and pop functions

* Fix clang formatting

* Add fucntions for updating FPSW TOP pointer

* Add `FLD` instruction lifitng, FPSW flag support, FP operand support

* Remove `x86_bool_to_bv` and use the standard `BOOL_TO_BV`

* Add implementation for `FST{P}`, and rounding mode support

* Add `FLD` variants for constants

* Fix formatting and build

* Add IL lifting for `FXCH`

* Add width checks to avoid redundant rounding

* Implement IL lifting for `FILD`, `FIST{P}`

    * Add helper functions to inter-convert floating point values and
      integers using the rounding mode in the control word

* FPU stack regs are 80-bit, not 64-bit

* Add RzIL lifting for `FBLD`

* Add RzIL implementation for `FBSTP`

    * An invalid-arithmetic-operand (#IA) exception may occurr if the
      value being converted to the BCD integer cannot fit in an 18-bit
      BCD integer. For the IL's purpose, we just jump to the "int" label
      (stands for interrupt) using `GOTO`.

* Remove all the `EMPTY()` ops after `GOTO()` ops

    * On second thought, using `EMPTY()` ops after `GOTO()` ops is not
      the best idea to indicate end of analysis. Maybe the hooks can
      signal that analysis needs to be restarted.
    * Also, clean up the comments of a bunch of unimplemented ops

* Moved some code around

* Rename "rmode" local variable to "_rmode"

* Add some TODOs for deffered work

* Fix failing asm tests

    * Caused due to the removal of the [empty] opcode

* Implement IL lifting for `FADD` (and some other minor refactoring)

    * Implement the IL lifting for `FADD`: This is not entirely correct
      as of now, because we don't handle setting C1 based on rounding
      up/down, but I think it should be fine for now. Need to tackle
      setting the control word bits later
    * Start using `RzFloatFormat` to describe the float's width instead
      of using an unsigned integer. Provide and expose conversion
      functions between the two

* Use a global to denote when RMode needs to be init, implement FIADD

    * Other minor refactor which fixes the CI (hopefully)

* Implement `FMUL` and `FIMUL`

    * Extract the common code into a C macro

* Implement RzIL for `FSUB` and `FISUB`

    * Also add `x86_il_fsub_with_rmode` helper

* Implement RzIL for `FSUBR` and `FISUBR`

    * Reuse the implementation of `x86_il_fsub_with_rmode` and just pass
      the arguments in the opposite order

* Add RzIL implementation for `FDIV`, `FIDIV`, `FDIVR`, `FIDIVR`

* Add pop versions of floating point arithmetic instuctions

    * Add a new macro `X86_ARITHMETIC_POP_IL` macro for the same
    * Fix a typo
    * Add a note for using `X86_INS_PFADD` for FADDP instruction on
      Capstone version newer than 4

* Add RzIL implementations for `FCOM`, `FCOMP` and `FCOMPP`

* Add RzIL lifting for `FUCOM` and `FCOMI` families of instructions

* Implement RzIL lifting for `FCHS` and `FTST`

* Add RzIL implementation for `FRNDINT` and `FSQRT`

* Add RzIL implementation for `FNOP` and `FISTTP`

* Remove global variable `use_rmode` and use pass around a context instead

    * Define a new `X86ILContext` struct to pass around information
      whether we need to intitialize the rouding mode or not
    * Remove the global variable which was previously responsible for
      doing so

* Add RzIL for `FICOM` and `FICOMP`, add register bindings and fix bugs

* Make `rz-test` more robust against IL outputs with newlines in them

* Add RzIL tests in db/asm for x86 FPU instructions

* Fix the bug when using `FADDP` with Capstone version > 4

* Fix remaining db tests

* Remove tests for `FSTSW` or `FSTCW` instructions

    * We already test `WAIT` (in `db/asm/x86_32`) and `FSTSW` (or
      `FSTCW`) (in `db/asm/x86_64`)
    * Remove the newline replacement code in `rz-test` as well, since we
      wouldn't need that functionality anymore

* Add asm tests for math constant push instructions

* Add `RZ_IPI` annotation for all the functions exposed through the header

* Add `RZ_OWN`, `RZ_BORROW` and `RZ_NONNULL` annotations

* Add Doxygen doc for `ctx` argument

* Add description for the `EXEC_WITH_RMODE` macro

* Move the non-null check for `ctx` inside the valid branch

    * When we pop the FPU stack we pass in a `NULL` context since no
      resizing would be needed, which causes a failure if the non-null
      check for the `ctx` is outside the branch
    * Fixes failing tests in `db/asm`

* Minor bug fixes + make the annotations less strict than they need to be

* Minor bug fixes

    * Incorrect implementation for `RET` and `CALL`
    * Swapped arguments for shift right

* Fix asm tests for `JMP` and `RET` instructions

* Fix indexing error for `FXCH`

* Review changes

    * Move all unimplemented instructions to the end
    * Remove support for Capstone version less than 4
2024-02-18 08:48:34 +08:00
..
6502 [RzIL] Coalesce nested seq when printing (#2262) 2022-01-28 16:58:51 +01:00
8051 8051 RzIL fixes (#3413) 2023-03-05 12:54:25 +08:00
amd29k_29000_32
arc_16
arc_32
arm_16 Make AArch64/ARM analysis and asm plugins Capstone v6 compatible. (#4011) 2023-12-20 01:00:31 +08:00
arm_32 Make AArch64/ARM analysis and asm plugins Capstone v6 compatible. (#4011) 2023-12-20 01:00:31 +08:00
arm_64 Disable ARM hacks for Capstone 6 (#4159) 2024-01-27 21:30:26 +08:00
arm_cortexm_16 arm: use cortexm cpu instead of cortex (#3674) 2023-07-20 16:20:04 +08:00
avr Fix #2851 - wrong AVR analysis jump value for rjmp/rcall (#3012) 2022-09-07 23:00:23 +02:00
bf [RzIL] Make bf emulation stateless (#2214) 2022-01-16 14:33:05 +01:00
chip8
cil Add dotnet PE support (#2528) 2022-06-21 09:20:47 +08:00
cr16
dalvik
ebc
gb Add gb (Game Boy, SM83) RzIL Lifting (#3750) 2023-09-10 13:47:38 +02:00
h8300
hexagon Add new system instructions. (#3980) 2023-11-16 22:21:48 +08:00
i4004
java
lh5801
luac_5.3_16
luac_5.4_16
mips.gnu_64
mips_64
mips_v2_64
msp430
or1k
pic_pic18_8
ppc_64 Add support for mtocrf and mfocrf if CS v6 is present. 2024-01-14 22:23:59 +08:00
ppc_qpx_64 [PPC/ARM] Update to Capstone v6/auto-sync (#3648) 2023-10-18 10:36:25 +08:00
riscv_32
rl78 Renesas RL78 disassembler plugin (#3649) 2023-10-14 00:15:03 +08:00
rx Disassembler arch for RX microcontroller (MCU) family (#4198) 2024-02-17 22:29:16 +08:00
sh [RzIL] IL lifting of SuperH ISA (#2518) 2022-08-02 02:37:03 +05:30
snes_16 Add asm tests for all legal 6502 ops 2022-01-14 00:47:33 +08:00
spc700
tms320_c55x+_32
tms320_c55x_32
tricore tricore fixes coverity (#4116) 2024-01-17 15:16:39 +08:00
v810 v810: RzIL support (#4096) 2024-01-14 10:45:48 +08:00
v850 v850: Add some undocumented instructions (#4187) 2024-02-08 23:10:31 +08:00
wasm
x86_16 Add RzIL for floating-point x86 instructions (#3865) 2024-02-18 08:48:34 +08:00
x86_32 Add RzIL for floating-point x86 instructions (#3865) 2024-02-18 08:48:34 +08:00
x86_64 Add RzIL for floating-point x86 instructions (#3865) 2024-02-18 08:48:34 +08:00
z80