* Add function to check if a register is a system register * Only checks for ARM64 system registers as of now * Check for system registers in ARM64 when printing registers using "dr" * Does not completely remove the unnecessary register, but removes a huge number of useless registers printed by "dr" * Rename `RZ_REG_TYPE_ALL` to `RZ_REG_TYPE_ANY` * ADd register types for "sys" and "pauth": `RZ_REG_TYPE_SYS` and `RZ_REG_TYPE_PAUTH` respectively * Remove `rz_reg_is_system_reg` * Add `sys` and `pauth` register profiles * Update debug tests to account for new arenas and register profiles * REplace "pauth" with "sec" reg profile * Update integration tests to account for new register profiles: `sys`, `sec`
106 lines
862 B
Text
106 lines
862 B
Text
NAME=ara swap
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FILE==
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CMDS=<<EOF
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e asm.arch=x86
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e asm.bits=64
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ara+
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ar rax=33
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ar rax
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aras
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ar rax
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EOF
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EXPECT=<<EOF
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0x00000021
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0x00000000
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EOF
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RUN
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NAME=ara swap 2
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FILE==
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CMDS=<<EOF
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e asm.arch=x86
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e asm.bits=64
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ara+
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ar rax=33
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ar rax
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aras
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ar rax
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aras
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ar rax
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EOF
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EXPECT=<<EOF
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0x00000021
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0x00000000
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0x00000021
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EOF
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RUN
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NAME=ara push
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FILE==
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CMDS=<<EOF
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e asm.arch=x86
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e asm.bits=64
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ara~?
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ara+
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ara~?
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EOF
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EXPECT=<<EOF
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20
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30
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EOF
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RUN
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NAME=ara pop
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FILE==
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CMDS=<<EOF
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e asm.arch=x86
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e asm.bits=64
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ara~?
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ara+
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ara~?
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ara-
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ara~?
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ara-
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ara~?
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ara-
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ara~?
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EOF
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EXPECT=<<EOF
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20
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30
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20
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10
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10
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EOF
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RUN
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NAME=arcc+tcc
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FILE==
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CMDS=<<EOF
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e asm.arch=x86
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e asm.bits=64
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afcl
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e asm.arch=arm
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e asm.bits=32
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arcc
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e asm.arch=x86
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e asm.bits=64
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arcc
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tcc `arcc`
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afcl
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EOF
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EXPECT=<<EOF
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amd64
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amd64syscall
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ms
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reg
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swift
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r0 reg(r0, r1, r2, r3)
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rdi reg(rdi, rsi, rdx, rcx)
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amd64
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amd64syscall
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ms
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reg
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swift
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EOF
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RUN
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