281 lines
10 KiB
C
281 lines
10 KiB
C
// SPDX-FileCopyrightText: 2014 condret <condr3t@protonmail.com>
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// SPDX-License-Identifier: LGPL-3.0-only
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#include <rz_types.h>
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typedef enum {
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SPC700_ARG_NONE,
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SPC700_ARG_IMM8,
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SPC700_ARG_ABS8,
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SPC700_ARG_ABS8_REL8,
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SPC700_ARG_ABS8_ABS8,
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SPC700_ARG_ABS16,
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SPC700_ARG_ABS13_BIT3,
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SPC700_ARG_REL8,
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SPC700_ARG_IMM8_ABS8,
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SPC700_ARG_UPPER8
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} Spc700ArgType;
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typedef struct spc700_op_t {
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char *name;
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Spc700ArgType arg;
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} Spc700Op;
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static const Spc700Op spc700_op_table[] = {
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{ "nop", SPC700_ARG_NONE },
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{ "tcall 0", SPC700_ARG_NONE },
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{ "set1 0x%02x.0", SPC700_ARG_ABS8 },
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{ "bbs 0x%02x.0, 0x%04x", SPC700_ARG_ABS8_REL8 },
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{ "or a, 0x%02x", SPC700_ARG_ABS8 },
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{ "or a, 0x%04x", SPC700_ARG_ABS16 },
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{ "or a, (x)", SPC700_ARG_NONE },
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{ "or a, [0x%02x+x]", SPC700_ARG_ABS8 },
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{ "or a, #0x%02x", SPC700_ARG_IMM8 },
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{ "or 0x%02x, 0x%02x", SPC700_ARG_ABS8_ABS8 },
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{ "or1 c, 0x%04x.%u", SPC700_ARG_ABS13_BIT3 },
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{ "asl 0x%02x", SPC700_ARG_ABS8 },
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{ "asl 0x%04x", SPC700_ARG_ABS16 },
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{ "push psw", SPC700_ARG_NONE },
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{ "tset1 0x%04x", SPC700_ARG_ABS16 },
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{ "brk", SPC700_ARG_NONE },
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{ "bpl 0x%04x", SPC700_ARG_REL8 },
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{ "tcall 1", SPC700_ARG_NONE },
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{ "clr1 0x%02x.0", SPC700_ARG_ABS8 },
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{ "bbc 0x%02x.0, 0x%04x", SPC700_ARG_ABS8_REL8 },
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{ "or a, 0x%02x+x", SPC700_ARG_ABS8 },
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{ "or a, 0x%04x+x", SPC700_ARG_ABS16 },
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{ "or a, 0x%04x+y", SPC700_ARG_ABS16 },
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{ "or a, [0x%02x]+y", SPC700_ARG_ABS8 },
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{ "or 0x%02x, #0x%02x", SPC700_ARG_IMM8_ABS8 },
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{ "or (x), (y)", SPC700_ARG_NONE },
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{ "decw 0x%02x", SPC700_ARG_ABS8 },
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{ "asl 0x%02x+x", SPC700_ARG_ABS8 },
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{ "asl a", SPC700_ARG_NONE },
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{ "dec x", SPC700_ARG_NONE },
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{ "cmp x, 0x%04x", SPC700_ARG_ABS16 },
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{ "jmp [0x%04x+x]", SPC700_ARG_ABS16 },
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{ "clrp", SPC700_ARG_NONE },
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{ "tcall 2", SPC700_ARG_NONE },
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{ "set1 0x%02x.1", SPC700_ARG_ABS8 },
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{ "bbs 0x%02x.1, 0x%04x", SPC700_ARG_ABS8_REL8 },
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{ "and a, 0x%02x", SPC700_ARG_ABS8 },
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{ "and a, 0x%04x", SPC700_ARG_ABS16 },
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{ "and a, (x)", SPC700_ARG_NONE },
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{ "and a, [0x%02x+x]", SPC700_ARG_ABS8 },
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{ "and a, #0x%02x", SPC700_ARG_IMM8 },
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{ "and 0x%02x, 0x%02x", SPC700_ARG_ABS8_ABS8 },
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{ "or1 c, ~0x%04x.%u", SPC700_ARG_ABS13_BIT3 },
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{ "rol 0x%02x", SPC700_ARG_ABS8 },
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{ "rol 0x%04x", SPC700_ARG_ABS16 },
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{ "push a", SPC700_ARG_NONE },
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{ "cbne 0x%02x, 0x%04x", SPC700_ARG_ABS8_REL8 },
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{ "bra 0x%04x", SPC700_ARG_REL8 },
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{ "bmi 0x%04x", SPC700_ARG_REL8 },
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{ "tcall 3", SPC700_ARG_NONE },
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{ "clr1 0x%02x.1", SPC700_ARG_ABS8 },
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{ "bbc 0x%02x.1, 0x%04x", SPC700_ARG_ABS8_REL8 },
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{ "and a, 0x%02x+x", SPC700_ARG_ABS8 },
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{ "and a, 0x%04x+x", SPC700_ARG_ABS16 },
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{ "and a, 0x%04x+y", SPC700_ARG_ABS16 },
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{ "and a, [0x%02x]+y", SPC700_ARG_ABS8 },
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{ "and 0x%02x, #0x%02x", SPC700_ARG_IMM8_ABS8 },
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{ "and (x), (y)", SPC700_ARG_NONE },
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{ "incw 0x%02x", SPC700_ARG_ABS8 },
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{ "rol 0x%02x+x", SPC700_ARG_ABS8 },
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{ "rol a", SPC700_ARG_NONE },
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{ "inc x", SPC700_ARG_NONE },
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{ "cmp x, 0x%02x", SPC700_ARG_ABS8 },
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{ "call 0x%04x", SPC700_ARG_ABS16 },
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{ "setp", SPC700_ARG_NONE },
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{ "tcall 4", SPC700_ARG_NONE },
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{ "set1 0x%02x.2", SPC700_ARG_ABS8 },
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{ "bbs 0x%02x.2, 0x%04x", SPC700_ARG_ABS8_REL8 },
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{ "eor a, 0x%02x", SPC700_ARG_ABS8 },
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{ "eor a, 0x%04x", SPC700_ARG_ABS16 },
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{ "eor a, (x)", SPC700_ARG_NONE },
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{ "eor a, [0x%02x+x]", SPC700_ARG_ABS8 },
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{ "eor a, #0x%02x", SPC700_ARG_IMM8 },
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{ "eor 0x%02x, 0x%02x", SPC700_ARG_ABS8_ABS8 },
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{ "and1 c, 0x%04x.%u", SPC700_ARG_ABS13_BIT3 },
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{ "lsr 0x%02x", SPC700_ARG_ABS8 },
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{ "lsr 0x%04x", SPC700_ARG_ABS16 },
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{ "push x", SPC700_ARG_NONE },
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{ "tclr1 0x%04x", SPC700_ARG_ABS16 },
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{ "pcall 0x%02x", SPC700_ARG_UPPER8 },
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{ "bvc 0x%04x", SPC700_ARG_REL8 },
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{ "tcall 5", SPC700_ARG_NONE },
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{ "clr1 0x%02x.2", SPC700_ARG_ABS8 },
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{ "bbc 0x%02x.2, 0x%04x", SPC700_ARG_ABS8_REL8 },
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{ "eor a, 0x%02x+x", SPC700_ARG_ABS8 },
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{ "eor a, 0x%04x+x", SPC700_ARG_ABS16 },
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{ "eor a, 0x%04x+y", SPC700_ARG_ABS16 },
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{ "eor a, [0x%02x]+y", SPC700_ARG_ABS8 },
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{ "eor 0x%02x, #0x%02x", SPC700_ARG_IMM8_ABS8 },
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{ "eor (x), (y)", SPC700_ARG_NONE },
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{ "cmpw ya, 0x%02x", SPC700_ARG_ABS8 },
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{ "lsr 0x%02x+x", SPC700_ARG_ABS8 },
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{ "lsr a", SPC700_ARG_NONE },
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{ "mov x, a", SPC700_ARG_NONE },
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{ "cmp y, 0x%04x", SPC700_ARG_ABS16 },
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{ "jmp 0x%04x", SPC700_ARG_ABS16 },
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{ "clrc", SPC700_ARG_NONE },
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{ "tcall 6", SPC700_ARG_NONE },
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{ "set1 0x%02x.3", SPC700_ARG_ABS8 },
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{ "bbs 0x%02x.3, 0x%04x", SPC700_ARG_ABS8_REL8 },
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{ "cmp a, 0x%02x", SPC700_ARG_ABS8 },
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{ "cmp a, 0x%04x", SPC700_ARG_ABS16 },
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{ "cmp a, (x)", SPC700_ARG_NONE },
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{ "cmp a, [0x%02x+x]", SPC700_ARG_ABS8 },
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{ "cmp a, #0x%02x", SPC700_ARG_IMM8 },
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{ "cmp 0x%02x, 0x%02x", SPC700_ARG_ABS8_ABS8 },
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{ "and1 c, ~0x%04x.%u", SPC700_ARG_ABS13_BIT3 },
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{ "ror 0x%02x", SPC700_ARG_ABS8 },
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{ "ror 0x%04x", SPC700_ARG_ABS16 },
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{ "push y", SPC700_ARG_NONE },
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{ "dbnz 0x%02x, 0x%04x", SPC700_ARG_ABS8_REL8 },
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{ "ret", SPC700_ARG_NONE },
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{ "bvs 0x%04x", SPC700_ARG_REL8 },
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{ "tcall 7", SPC700_ARG_NONE },
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{ "clr1 0x%02x.3", SPC700_ARG_ABS8 },
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{ "bbc 0x%02x.3, 0x%04x", SPC700_ARG_ABS8_REL8 },
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{ "cmp a, 0x%02x+x", SPC700_ARG_ABS8 },
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{ "cmp a, 0x%04x+x", SPC700_ARG_ABS16 },
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{ "cmp a, 0x%04x+y", SPC700_ARG_ABS16 },
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{ "cmp a, [0x%02x]+y", SPC700_ARG_ABS8 },
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{ "cmp 0x%02x, #0x%02x", SPC700_ARG_IMM8_ABS8 },
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{ "cmp (x), (y)", SPC700_ARG_NONE },
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{ "addw ya, 0x%02x", SPC700_ARG_ABS8 },
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{ "ror 0x%02x+x", SPC700_ARG_ABS8 },
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{ "ror a", SPC700_ARG_NONE },
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{ "mov a, x", SPC700_ARG_NONE },
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{ "cmp y, 0x%02x", SPC700_ARG_ABS8 },
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{ "ret1", SPC700_ARG_NONE },
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{ "setc", SPC700_ARG_NONE },
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{ "tcall 8", SPC700_ARG_NONE },
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{ "set1 0x%02x.4", SPC700_ARG_ABS8 },
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{ "bbs 0x%02x.4, 0x%04x", SPC700_ARG_ABS8_REL8 },
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{ "adc a, 0x%02x", SPC700_ARG_ABS8 },
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{ "adc a, 0x%04x", SPC700_ARG_ABS16 },
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{ "adc a, (x)", SPC700_ARG_NONE },
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{ "adc a, [0x%02x+x]", SPC700_ARG_ABS8 },
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{ "adc a, #0x%02x", SPC700_ARG_IMM8 },
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{ "adc 0x%02x, 0x%02x", SPC700_ARG_ABS8_ABS8 },
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{ "eor1 c, 0x%04x.%u", SPC700_ARG_ABS13_BIT3 },
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{ "dec 0x%02x", SPC700_ARG_ABS8 },
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{ "dec 0x%04x", SPC700_ARG_ABS16 },
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{ "mov y, #0x%02x", SPC700_ARG_IMM8 },
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{ "pop psw", SPC700_ARG_NONE },
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{ "mov 0x%02x, #0x%02x", SPC700_ARG_IMM8_ABS8 },
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{ "bcc 0x%04x", SPC700_ARG_REL8 },
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{ "tcall 9", SPC700_ARG_NONE },
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{ "clr1 0x%02x.4", SPC700_ARG_ABS8 },
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{ "bbc 0x%02x.4, 0x%04x", SPC700_ARG_ABS8_REL8 },
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{ "adc a, 0x%02x+x", SPC700_ARG_ABS8 },
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{ "adc a, 0x%04x+x", SPC700_ARG_ABS16 },
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{ "adc a, 0x%04x+y", SPC700_ARG_ABS16 },
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{ "adc a, [0x%02x]+y", SPC700_ARG_ABS8 },
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{ "adc 0x%02x, #0x%02x", SPC700_ARG_IMM8_ABS8 },
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{ "adc (x), (y)", SPC700_ARG_NONE },
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{ "subw ya, 0x%02x", SPC700_ARG_ABS8 },
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{ "dec 0x%02x+x", SPC700_ARG_ABS8 },
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{ "dec a", SPC700_ARG_NONE },
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{ "mov x, sp", SPC700_ARG_NONE },
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{ "div ya, x", SPC700_ARG_NONE },
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{ "xcn a", SPC700_ARG_NONE },
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{ "ei", SPC700_ARG_NONE },
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{ "tcall 10", SPC700_ARG_NONE },
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{ "set1 0x%02x.5", SPC700_ARG_ABS8 },
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{ "bbs 0x%02x.5, 0x%04x", SPC700_ARG_ABS8_REL8 },
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{ "sbc a, 0x%02x", SPC700_ARG_ABS8 },
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{ "sbc a, 0x%04x", SPC700_ARG_ABS16 },
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{ "sbc a, (x)", SPC700_ARG_NONE },
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{ "sbc a, [0x%02x+x]", SPC700_ARG_ABS8 },
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{ "sbc a, #0x%02x", SPC700_ARG_IMM8 },
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{ "sbc 0x%02x, 0x%02x", SPC700_ARG_ABS8_ABS8 },
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{ "mov1 c, 0x%04x.%u", SPC700_ARG_ABS13_BIT3 },
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{ "inc 0x%02x", SPC700_ARG_ABS8 },
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{ "inc 0x%04x", SPC700_ARG_ABS16 },
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{ "cmp y, #0x%02x", SPC700_ARG_IMM8 },
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{ "pop a", SPC700_ARG_NONE },
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{ "mov (x)+, a", SPC700_ARG_NONE },
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{ "bcs 0x%04x", SPC700_ARG_REL8 },
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{ "tcall 11", SPC700_ARG_NONE },
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{ "clr1 0x%02x.5", SPC700_ARG_ABS8 },
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{ "bbc 0x%02x.5, 0x%04x", SPC700_ARG_ABS8_REL8 },
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{ "sbc a, 0x%02x+x", SPC700_ARG_ABS8 },
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{ "sbc a, 0x%04x+x", SPC700_ARG_ABS16 },
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{ "sbc a, 0x%04x+y", SPC700_ARG_ABS16 },
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{ "sbc a, [0x%02x]+y", SPC700_ARG_ABS8 },
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{ "sbc 0x%02x, #0x%02x", SPC700_ARG_IMM8_ABS8 },
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{ "sbc (x), (y)", SPC700_ARG_NONE },
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{ "movw ya, 0x%02x", SPC700_ARG_ABS8 },
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{ "inc 0x%02x+x", SPC700_ARG_ABS8 },
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{ "inc a", SPC700_ARG_NONE },
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{ "mov sp, x", SPC700_ARG_NONE },
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{ "das a", SPC700_ARG_NONE },
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{ "mov a, (x)+", SPC700_ARG_NONE },
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{ "di", SPC700_ARG_NONE },
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{ "tcall 12", SPC700_ARG_NONE },
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{ "set1 0x%02x.6", SPC700_ARG_ABS8 },
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{ "bbs 0x%02x.6, 0x%04x", SPC700_ARG_ABS8_REL8 },
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{ "mov 0x%02x, a", SPC700_ARG_ABS8 },
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{ "mov 0x%04x, a", SPC700_ARG_ABS16 },
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{ "mov (x), a", SPC700_ARG_NONE },
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{ "mov [0x%02x+x], a", SPC700_ARG_ABS8 },
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{ "cmp x, #0x%02x", SPC700_ARG_IMM8 },
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{ "mov 0x%04x, x", SPC700_ARG_ABS16 },
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{ "mov1 0x%04x.%u, c", SPC700_ARG_ABS13_BIT3 },
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{ "mov 0x%02x, y", SPC700_ARG_ABS8 },
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{ "mov 0x%04x, y", SPC700_ARG_ABS16 },
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{ "mov x, #0x%02x", SPC700_ARG_IMM8 },
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{ "pop x", SPC700_ARG_NONE },
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{ "mul ya", SPC700_ARG_NONE },
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{ "bne 0x%04x", SPC700_ARG_REL8 },
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{ "tcall 13", SPC700_ARG_NONE },
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{ "clr1 0x%02x.6", SPC700_ARG_ABS8 },
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{ "bbc 0x%02x.6, 0x%04x", SPC700_ARG_ABS8_REL8 },
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{ "mov 0x%02x+x, a", SPC700_ARG_ABS8 },
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{ "mov 0x%04x+x, a", SPC700_ARG_ABS16 },
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{ "mov 0x%04x+y, a", SPC700_ARG_ABS16 },
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{ "mov [0x%02x]+y, a", SPC700_ARG_ABS8 },
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{ "mov 0x%02x, x", SPC700_ARG_ABS8 },
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{ "mov 0x%02x+y, x", SPC700_ARG_ABS8 },
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{ "movw 0x%02x, ya", SPC700_ARG_ABS8 },
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{ "mov 0x%02x+x, y", SPC700_ARG_ABS8 },
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{ "dec y", SPC700_ARG_NONE },
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{ "mov a, y", SPC700_ARG_NONE },
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{ "cbne 0x%02x+x, 0x%04x", SPC700_ARG_ABS8_REL8 },
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{ "daa a", SPC700_ARG_NONE },
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{ "clrv", SPC700_ARG_NONE },
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{ "tcall 14", SPC700_ARG_NONE },
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{ "set1 0x%02x.7", SPC700_ARG_ABS8 },
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{ "bbs 0x%02x.7, 0x%04x", SPC700_ARG_ABS8_REL8 },
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{ "mov a, 0x%02x", SPC700_ARG_ABS8 },
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{ "mov a, 0x%04x", SPC700_ARG_ABS16 },
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{ "mov a, (x)", SPC700_ARG_NONE },
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{ "mov a, [0x%02x+x]", SPC700_ARG_ABS8 },
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{ "mov a, #0x%02x", SPC700_ARG_IMM8 },
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{ "mov x, 0x%04x", SPC700_ARG_ABS16 },
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{ "not1 0x%04x.%u", SPC700_ARG_ABS13_BIT3 },
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{ "mov y, 0x%02x", SPC700_ARG_ABS8 },
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{ "mov y, 0x%04x", SPC700_ARG_ABS16 },
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{ "notc", SPC700_ARG_NONE },
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{ "pop y", SPC700_ARG_NONE },
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{ "sleep", SPC700_ARG_NONE },
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{ "beq 0x%04x", SPC700_ARG_REL8 },
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{ "tcall 15", SPC700_ARG_NONE },
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{ "clr1 0x%02x.7", SPC700_ARG_ABS8 },
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{ "bbc 0x%02x.7, 0x%04x", SPC700_ARG_ABS8_REL8 },
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{ "mov a, 0x%02x+x", SPC700_ARG_ABS8 },
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{ "mov a, 0x%04x+x", SPC700_ARG_ABS16 },
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{ "mov a, 0x%04x+y", SPC700_ARG_ABS16 },
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{ "mov a, [0x%02x]+y", SPC700_ARG_ABS8 },
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{ "mov x, 0x%02x", SPC700_ARG_ABS8 },
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{ "mov x, 0x%02x+y", SPC700_ARG_ABS8 },
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{ "mov 0x%02x, 0x%02x", SPC700_ARG_ABS8_ABS8 },
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{ "mov y, 0x%02x+x", SPC700_ARG_ABS8 },
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{ "inc y", SPC700_ARG_NONE },
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{ "mov y, a", SPC700_ARG_NONE },
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{ "dbnz y, 0x%04x", SPC700_ARG_REL8 },
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{ "stop", SPC700_ARG_NONE }
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};
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