270 lines
6.3 KiB
C++
270 lines
6.3 KiB
C++
// SPDX-FileCopyrightText: 2020 phakeobj
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// SPDX-License-Identifier: LGPL-3.0-only
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static char *hack_handle_dp_imm(ut32 insn) {
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char *buf_asm = NULL;
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char *mnemonic = NULL;
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const ut8 op0 = (insn >> 23) & 0x7;
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// Add/subtract (immediate, with tags)
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if (op0 == 3) {
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const bool sf = (insn >> 31) & 0x1;
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const bool op = (insn >> 30) & 0x1;
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const bool S = (insn >> 29) & 0x1;
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const bool o2 = (insn >> 22) & 0x1;
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if (sf && !S && !o2) {
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if (op) {
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mnemonic = "subg";
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} else {
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mnemonic = "addg";
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}
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}
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if (mnemonic) {
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const ut8 uimm6 = ((insn >> 16) & 0x3f) << 4;
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const ut8 uimm4 = (insn >> 10) & 0xf;
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const ut8 Xn = (insn >> 5) & 0x1f;
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const ut8 Xd = (insn >> 0) & 0x1f;
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buf_asm = rz_str_newf("%s x%d, x%d, #0x%x, #0x%x",
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mnemonic, Xd, Xn, uimm6, uimm4);
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buf_asm = rz_str_replace(buf_asm, "x31", "sp", 1);
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return buf_asm;
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}
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}
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return NULL;
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}
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static char *hack_handle_br_exc_sys(ut32 insn) {
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char *buf_asm = NULL;
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const char *mnemonic = "bti";
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const ut8 op0 = (insn >> 29) & 0x7;
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const ut16 op1 = (insn >> 12) & 0x3fff;
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ut8 op2 = insn & 0x1f;
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// Hints
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if (op0 == 6 && op1 == 4146 && op2 == 31) {
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const ut8 CRm = (insn >> 8) & 0xf;
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op2 = (insn >> 5) & 0x7;
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if (CRm == 4 && (op2 & 1) == 0) {
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switch (op2) {
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case 0:
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buf_asm = rz_str_newf("%s", mnemonic);
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break;
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case 2:
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buf_asm = rz_str_newf("%s c", mnemonic);
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break;
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case 4:
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buf_asm = rz_str_newf("%s j", mnemonic);
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break;
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case 6:
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buf_asm = rz_str_newf("%s jc", mnemonic);
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break;
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}
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}
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}
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return buf_asm;
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}
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static char *hack_handle_dp_reg(ut32 insn) {
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char *buf_asm = NULL;
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char *mnemonic = NULL;
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const bool op0 = (insn >> 30) & 0x1;
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const bool op1 = (insn >> 28) & 0x1;
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const ut8 op2 = (insn >> 21) & 0xf;
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// Data-processing (2 source)
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if (!op0 && op1 && op2 == 6) {
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const bool sf = (insn >> 31) & 0x1;
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const bool S = (insn >> 29) & 0x1;
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const ut8 opcode = (insn >> 10) & 0x1f;
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if (sf) {
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if (!S) {
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if (opcode == 4) {
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mnemonic = "irg";
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} else if (opcode == 0) {
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mnemonic = "subp";
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} else if (opcode == 5) {
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mnemonic = "gmi";
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}
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} else if (S && opcode == 0) {
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mnemonic = "subps";
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}
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}
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if (mnemonic) {
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const ut8 Xm = (insn >> 16) & 0x1f;
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const ut8 Xn = (insn >> 5) & 0x1f;
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const ut8 Xd = (insn >> 0) & 0x1f;
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if (Xm == 31 && !strcmp(mnemonic, "irg")) {
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// Xm is xzr, discard it
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buf_asm = rz_str_newf("%s x%d, x%d", mnemonic, Xd, Xn);
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} else if (!strcmp(mnemonic, "subps") && S == 1 && Xd == 0x1f) {
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// ccmp is an alias for subps when S == '1' && Xd == '11111'
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buf_asm = rz_str_newf("cmpp x%d, x%d", Xn, Xm);
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} else {
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buf_asm = rz_str_newf("%s x%d, x%d, x%d", mnemonic, Xd, Xn, Xm);
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}
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buf_asm = rz_str_replace(buf_asm, "x31", "sp", 1);
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return buf_asm;
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}
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}
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return NULL;
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}
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static char *hack_handle_ldst(ut32 insn) {
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char *buf_asm = NULL;
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char *mnemonic = NULL;
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bool ignore_imm9 = false;
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const ut8 op0 = (insn >> 28) & 0xf;
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const bool op1 = (insn >> 26) & 0x1;
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ut8 op2 = (insn >> 23) & 0x3;
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const bool op3 = (insn >> 21) & 0x1;
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// Load/store memory tags
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if (op0 == 13 && !op1 && (op2 == 2 || op2 == 3) && op3) {
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const ut8 opc = (insn >> 22) & 0x3;
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const ut16 imm9 = ((insn >> 12) & 0x1ff) << 4;
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op2 = (insn >> 10) & 0x3;
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const ut8 Xn = (insn >> 5) & 0x1f;
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const ut8 Xt = (insn >> 0) & 0x1f;
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if (op2 > 0) {
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switch (opc) {
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case 0:
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mnemonic = "stg";
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break;
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case 1:
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mnemonic = "stzg";
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break;
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case 2:
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mnemonic = "st2g";
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break;
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case 3:
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mnemonic = "stz2g";
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break;
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}
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switch (op2) {
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case 1:
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buf_asm = rz_str_newf("%s x%d, [x%d], #0x%x",
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mnemonic, Xt, Xn, imm9);
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break;
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case 2:
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buf_asm = rz_str_newf("%s x%d, [x%d, #0x%x]",
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mnemonic, Xt, Xn, imm9);
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break;
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case 3:
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buf_asm = rz_str_newf("%s x%d, [x%d, #0x%x]!",
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mnemonic, Xt, Xn, imm9);
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break;
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}
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buf_asm = rz_str_replace(buf_asm, "x31", "sp", 1);
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return buf_asm;
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} else if (op2 == 0) {
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switch (opc) {
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case 0:
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mnemonic = "stzgm";
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ignore_imm9 = true;
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break;
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case 1:
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mnemonic = "ldg";
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break;
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case 2:
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mnemonic = "stgm";
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ignore_imm9 = true;
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break;
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case 3:
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mnemonic = "ldgm";
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ignore_imm9 = true;
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break;
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}
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if (ignore_imm9) {
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buf_asm = rz_str_newf("%s x%d, [x%d]",
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mnemonic, Xt, Xn);
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} else {
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buf_asm = rz_str_newf("%s x%d, [x%d, #0x%x]",
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mnemonic, Xt, Xn, imm9);
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}
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buf_asm = rz_str_replace(buf_asm, "x31", "sp", 1);
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return buf_asm;
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}
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// Load/store register pair
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} else if ((op0 & 0x3) == 2) {
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const ut8 opc = (insn >> 30) & 0x3;
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const bool V = (insn >> 26) & 0x1;
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const bool L = (insn >> 22) & 0x1;
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if (opc == 1 && !V && !L) {
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const ut8 imm7 = ((insn >> 15) & 0x7f) << 4;
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const ut8 Xt2 = (insn >> 10) & 0x1f;
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const ut8 Xn = (insn >> 5) & 0x1f;
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const ut8 Xt = (insn >> 0) & 0x1f;
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switch (op2) {
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case 1:
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buf_asm = rz_str_newf("stgp x%d, x%d, [x%d], #0x%x",
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Xt, Xt2, Xn, imm7);
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break;
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case 2:
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buf_asm = rz_str_newf("stgp x%d, x%d, [x%d, #0x%x]",
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Xt, Xt2, Xn, imm7);
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break;
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case 3:
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buf_asm = rz_str_newf("stgp x%d, x%d, [x%d, #0x%x]!",
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Xt, Xt2, Xn, imm7);
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break;
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default:
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return NULL;
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}
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buf_asm = rz_str_replace(buf_asm, "x31", "sp", 1);
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return buf_asm;
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}
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}
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return NULL;
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}
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static int hackyArmAsm(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) {
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char *buf_asm = NULL;
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// Hacky support for ARMv8.5
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if (a->bits == 64 && len >= 4) {
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ut32 insn = rz_read_ble32(buf, a->big_endian);
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int insn_class = (insn >> 25) & 0xf;
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switch (insn_class) {
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// Data Processing -- Register
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case 5:
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case 13:
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// irg, subp, gmi, subps
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buf_asm = hack_handle_dp_reg(insn);
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break;
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// Data Processing -- Immediate
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case 8:
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case 9:
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// addg, subg
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buf_asm = hack_handle_dp_imm(insn);
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break;
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// Branches, Exception generating, and System instructions
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case 10:
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case 11:
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// bti
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buf_asm = hack_handle_br_exc_sys(insn);
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break;
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// Loads and Stores
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case 4:
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case 6:
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case 12:
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case 14:
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// stg, stzgm, ldg, stzg, st2g, stgm, stz2g, ldgm, stgp
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buf_asm = hack_handle_ldst(insn);
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break;
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default:
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break;
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}
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if (buf_asm) {
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if (!a->immdisp) {
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rz_str_replace_char(buf_asm, '#', 0);
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}
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rz_strbuf_set(&op->buf_asm, buf_asm);
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free(buf_asm);
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return op->size = 4;
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}
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}
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return -1;
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}
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