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x86/vcpu: Expose VMX entry controls to userspace

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Allow userspace reads and writes to `VMX_CONTROL_ENTRY_CONTROLS` field
of VMCS. Which is primarily used for enabling long mode and loading of
certain MSRs on VM Entry. As far as I know this field only controls the
behaviour of the VCPU and would not allow userspace to violate any
kernel properties such as disabling external interrupt exiting or EPT.

The effects of bits in this field are defined in
Chapter 27.8 "VM-ENTRY CONTROL FIELDS" of the
Intel SDM Order Number: 325462-090US February 2026.

Signed-off-by: Bill Nguyen <bill.nguyen@unsw.edu.au>
This commit is contained in:
Bill Nguyen 2026-03-03 10:19:32 +11:00 committed by Gerwin Klein
parent f82e8dc9da
commit 1beb9c0064
1 changed files with 4 additions and 0 deletions
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4
src/arch/x86/object/vcpu.c
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@ -902,6 +902,9 @@ static exception_t decodeWriteVMCS(cap_t cap, word_t length, bool_t call, word_t
case VMX_CONTROL_SECONDARY_PROCESSOR_CONTROLS:
value = applyFixedBits(value, secondary_control_high, secondary_control_low);
break;
case VMX_CONTROL_ENTRY_CONTROLS:
value = applyFixedBits(value, entry_control_high, entry_control_low);
break;
case VMX_CONTROL_EXIT_CONTROLS:
value = applyFixedBits(value, exit_control_high, exit_control_low);
break;
@ -1038,6 +1041,7 @@ static exception_t decodeReadVMCS(cap_t cap, word_t length, bool_t call, word_t
case VMX_CONTROL_PIN_EXECUTION_CONTROLS:
case VMX_CONTROL_PRIMARY_PROCESSOR_CONTROLS:
case VMX_CONTROL_EXCEPTION_BITMAP:
case VMX_CONTROL_ENTRY_CONTROLS:
case VMX_CONTROL_EXIT_CONTROLS:
case VMX_GUEST_CR0:
case VMX_GUEST_CR3: