diff --git a/include/plat/spike/plat/instance/hifive/hardware.h b/include/plat/spike/plat/instance/hifive/hardware.h
new file mode 100644
index 000000000..c9387b802
--- /dev/null
+++ b/include/plat/spike/plat/instance/hifive/hardware.h
@@ -0,0 +1,27 @@
+/*
+ * Copyright 2019, Data61
+ * Commonwealth Scientific and Industrial Research Organisation (CSIRO)
+ * ABN 41 687 119 230.
+ *
+ * This software may be distributed and modified according to the terms of
+ * the GNU General Public License version 2. Note that NO WARRANTY is provided.
+ * See "LICENSE_GPLv2.txt" for details.
+ *
+ * @TAG(DATA61_GPL)
+ */
+
+#ifndef __PLAT_INSTANCE_HARDWARE_H
+#define __PLAT_INSTANCE_HARDWARE_H
+
+/* Available physical memory regions on platform (RAM minus kernel image). */
+/* NOTE: Regions are not allowed to be adjacent! */
+static p_region_t BOOT_DATA avail_p_regs[] = {
+    /* The first 2MB are reserved for the SBI in the BBL */
+#if defined(CONFIG_ARCH_RISCV64)
+    { /*.start = */ 0x80200000, /* .end = */ 0x17FF00000}
+#elif defined(CONFIG_ARCH_RISCV32)
+    { /*.start = */ 0x80200000, /* .end = */ 0xFD000000}
+#endif
+};
+
+#endif
diff --git a/include/plat/spike/plat/instance/qemu/hardware.h b/include/plat/spike/plat/instance/qemu/hardware.h
new file mode 100644
index 000000000..c9387b802
--- /dev/null
+++ b/include/plat/spike/plat/instance/qemu/hardware.h
@@ -0,0 +1,27 @@
+/*
+ * Copyright 2019, Data61
+ * Commonwealth Scientific and Industrial Research Organisation (CSIRO)
+ * ABN 41 687 119 230.
+ *
+ * This software may be distributed and modified according to the terms of
+ * the GNU General Public License version 2. Note that NO WARRANTY is provided.
+ * See "LICENSE_GPLv2.txt" for details.
+ *
+ * @TAG(DATA61_GPL)
+ */
+
+#ifndef __PLAT_INSTANCE_HARDWARE_H
+#define __PLAT_INSTANCE_HARDWARE_H
+
+/* Available physical memory regions on platform (RAM minus kernel image). */
+/* NOTE: Regions are not allowed to be adjacent! */
+static p_region_t BOOT_DATA avail_p_regs[] = {
+    /* The first 2MB are reserved for the SBI in the BBL */
+#if defined(CONFIG_ARCH_RISCV64)
+    { /*.start = */ 0x80200000, /* .end = */ 0x17FF00000}
+#elif defined(CONFIG_ARCH_RISCV32)
+    { /*.start = */ 0x80200000, /* .end = */ 0xFD000000}
+#endif
+};
+
+#endif
diff --git a/include/plat/spike/plat/instance/rocket-chip/hardware.h b/include/plat/spike/plat/instance/rocket-chip/hardware.h
new file mode 100644
index 000000000..9fe49c834
--- /dev/null
+++ b/include/plat/spike/plat/instance/rocket-chip/hardware.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright 2019, Data61
+ * Commonwealth Scientific and Industrial Research Organisation (CSIRO)
+ * ABN 41 687 119 230.
+ *
+ * This software may be distributed and modified according to the terms of
+ * the GNU General Public License version 2. Note that NO WARRANTY is provided.
+ * See "LICENSE_GPLv2.txt" for details.
+ *
+ * @TAG(DATA61_GPL)
+ */
+
+#ifndef __PLAT_INSTANCE_HARDWARE_H
+#define __PLAT_INSTANCE_HARDWARE_H
+
+/* Available physical memory regions on platform (RAM minus kernel image). */
+/* NOTE: Regions are not allowed to be adjacent! */
+static p_region_t BOOT_DATA avail_p_regs[] = {
+    /* The first 2MB are reserved for the SBI in the BBL */
+    { /*.start = */ 0x0, /* .end = */ 0x10000000}
+};
+
+#endif
diff --git a/include/plat/spike/plat/machine.h b/include/plat/spike/plat/machine.h
index b5e4be51f..514f3f9a6 100644
--- a/include/plat/spike/plat/machine.h
+++ b/include/plat/spike/plat/machine.h
@@ -20,6 +20,17 @@
 #define __PLAT_MACHINE_H
 
 #ifndef __ASSEMBLER__
+
+#if defined(CONFIG_BUILD_SPIKE_QEMU)
+#include <plat/instance/qemu/hardware.h>
+#elif defined(CONFIG_BUILD_ROCKET_CHIP_ZEDBOARD)
+#include <plat/instance/rocket-chip/hardware.h>
+#elif defined(CONFIG_BUILD_HI_FIVE_UNLEASHED)
+#include <plat/instance/hifive/hardware.h>
+#else
+#error "Unsupported spike platform chosen"
+#endif
+
 enum IRQConstants {
     INTERRUPT_SW = 0,
     INTERRUPT_TIMER = 5,
diff --git a/src/plat/spike/machine/hardware.c b/src/plat/spike/machine/hardware.c
index a79fb01f5..afffe7e8d 100644
--- a/src/plat/spike/machine/hardware.c
+++ b/src/plat/spike/machine/hardware.c
@@ -39,19 +39,6 @@
 
 #define RESET_CYCLES ((CONFIG_SPIKE_CLOCK_FREQ / MS_IN_S) * CONFIG_TIMER_TICK_MS)
 
-/* Available physical memory regions on platform (RAM minus kernel image). */
-/* NOTE: Regions are not allowed to be adjacent! */
-
-static p_region_t BOOT_DATA avail_p_regs[] = {
-    /* The first 2MB are reserved for the SBI in the BBL */
-#if defined(CONFIG_BUILD_ROCKET_CHIP_ZEDBOARD)
-    { /*.start = */ 0x0, /* .end = */ 0x10000000}
-#elif defined(CONFIG_ARCH_RISCV64)
-    { /*.start = */ 0x80200000, /* .end = */ 0x17FF00000}
-#elif defined(CONFIG_ARCH_RISCV32)
-    { /*.start = */ 0x80200000, /* .end = */ 0xFD000000}
-#endif
-};
 
 BOOT_CODE int get_num_avail_p_regs(void)
 {