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style: set min-conditional-indent to 0

Browse source 
Given we use braces all the time conditional indents do not make code
cleaner.
This commit is contained in:
Anna Lyons 2019-03-19 13:47:05 +11:00
parent 8f454e151a
commit 306453e347
40 changed files with 239 additions and 239 deletions
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4
include/api/debug.h
View file

@ -46,8 +46,8 @@ static inline void debug_printKernelEntryReason(void)
case Entry_Syscall:
printf("Syscall, number: %ld, %s\n", (long) ksKernelEntry.syscall_no, syscall_names[ksKernelEntry.syscall_no]);
if (ksKernelEntry.syscall_no == -SysSend ||
ksKernelEntry.syscall_no == -SysNBSend ||
ksKernelEntry.syscall_no == -SysCall) {
ksKernelEntry.syscall_no == -SysNBSend ||
ksKernelEntry.syscall_no == -SysCall) {
printf("Cap type: %lu, Invocation tag: %lu\n", (unsigned long) ksKernelEntry.cap_type,
(unsigned long) ksKernelEntry.invocation_tag);

2
src/api/syscall.c
View file

@ -317,7 +317,7 @@ static exception_t handleInvocation(bool_t isCall, bool_t isBlocking)
}
if (unlikely(
thread_state_get_tsType(thread->tcbState) == ThreadState_Restart)) {
thread_state_get_tsType(thread->tcbState) == ThreadState_Restart)) {
if (isCall) {
replyFromKernel_success_empty(thread);
}

32
src/arch/arm/32/kernel/vspace.c
View file

@ -135,11 +135,11 @@ vm_rights_t CONST maskVMRights(vm_rights_t vm_rights, seL4_CapRights_t cap_right
return VMNoAccess;
}
if (vm_rights == VMReadOnly &&
seL4_CapRights_get_capAllowRead(cap_rights_mask)) {
seL4_CapRights_get_capAllowRead(cap_rights_mask)) {
return VMReadOnly;
}
if (vm_rights == VMReadWrite &&
seL4_CapRights_get_capAllowRead(cap_rights_mask)) {
seL4_CapRights_get_capAllowRead(cap_rights_mask)) {
if (!seL4_CapRights_get_capAllowWrite(cap_rights_mask)) {
return VMReadOnly;
} else {
@ -147,8 +147,8 @@ vm_rights_t CONST maskVMRights(vm_rights_t vm_rights, seL4_CapRights_t cap_right
}
}
if (vm_rights == VMReadWrite &&
!seL4_CapRights_get_capAllowRead(cap_rights_mask) &&
seL4_CapRights_get_capAllowWrite(cap_rights_mask)) {
!seL4_CapRights_get_capAllowRead(cap_rights_mask) &&
seL4_CapRights_get_capAllowWrite(cap_rights_mask)) {
userError("Attempted to make unsupported write only mapping");
}
return VMKernelOnly;
@ -567,8 +567,8 @@ BOOT_CODE cap_t create_it_address_space(cap_t root_cnode_cap, v_region_t it_v_re
/* create all PT objs and caps necessary to cover userland image */
for (pt_vptr = ROUND_DOWN(it_v_reg.start, PT_INDEX_BITS + PAGE_BITS);
pt_vptr < it_v_reg.end;
pt_vptr += BIT(PT_INDEX_BITS + PAGE_BITS)) {
pt_vptr < it_v_reg.end;
pt_vptr += BIT(PT_INDEX_BITS + PAGE_BITS)) {
pt_pptr = alloc_region(seL4_PageTableBits);
if (!pt_pptr) {
return cap_null_cap_new();
@ -1068,7 +1068,7 @@ void setVMRoot(tcb_t *tcb)
threadRoot = TCB_PTR_CTE_PTR(tcb, tcbVTable)->cap;
if (cap_get_capType(threadRoot) != cap_page_directory_cap ||
!cap_page_directory_cap_get_capPDIsMapped(threadRoot)) {
!cap_page_directory_cap_get_capPDIsMapped(threadRoot)) {
#ifdef CONFIG_ARM_HYPERVISOR_SUPPORT
setCurrentPD(addrFromPPtr(armUSGlobalPD));
#else
@ -1102,8 +1102,8 @@ static bool_t setVMRootForFlush(pde_t *pd, asid_t asid)
threadRoot = TCB_PTR_CTE_PTR(NODE_STATE(ksCurThread), tcbVTable)->cap;
if (cap_get_capType(threadRoot) == cap_page_directory_cap &&
cap_page_directory_cap_get_capPDIsMapped(threadRoot) &&
PDE_PTR(cap_page_directory_cap_get_capPDBasePtr(threadRoot)) == pd) {
cap_page_directory_cap_get_capPDIsMapped(threadRoot) &&
PDE_PTR(cap_page_directory_cap_get_capPDBasePtr(threadRoot)) == pd) {
return false;
}
@ -1187,8 +1187,8 @@ hw_asid_t findFreeHWASID(void)
/* Find a free hardware ASID */
for (hw_asid_offset = 0;
hw_asid_offset <= (word_t)((hw_asid_t) - 1);
hw_asid_offset ++) {
hw_asid_offset <= (word_t)((hw_asid_t) - 1);
hw_asid_offset ++) {
hw_asid = armKSNextASID + ((hw_asid_t)hw_asid_offset);
if (armKSHWASIDTable[hw_asid] == asidInvalid) {
return hw_asid;
@ -1328,7 +1328,7 @@ exception_t handleVMFault(tcb_t *thread, vm_fault_type_t vm_faultType)
current_fault = handleUserLevelDebugException(pc);
if (seL4_Fault_DebugException_get_exceptionReason(current_fault) == seL4_SingleStep
&& !singleStepFaultCounterReady(thread)) {
&& !singleStepFaultCounterReady(thread)) {
/* Don't send a fault message to the thread yet if we were asked
* to step through N instructions and the counter isn't depleted
* yet.
@ -1710,7 +1710,7 @@ createSafeMappingEntries_PTE
if (unlikely(pte_get_pteType(ret.pte_entries.base[i]) ==
pte_pte_small)
#ifdef CONFIG_ARM_HYPERVISOR_SUPPORT
&& !pte_pte_small_get_contiguous_hint(ret.pte_entries.base[i])
&& !pte_pte_small_get_contiguous_hint(ret.pte_entries.base[i])
#endif
) {
current_syscall_error.type =
@ -2208,7 +2208,7 @@ static exception_t decodeARMPageDirectoryInvocation(word_t invLabel, word_t leng
/* Refuse to cross a page boundary. */
if (pageBase(start, resolve_ret.frameSize) !=
pageBase(end - 1, resolve_ret.frameSize)) {
pageBase(end - 1, resolve_ret.frameSize)) {
userError("PD Flush: Range is across page boundary.");
current_syscall_error.type = seL4_RangeError;
current_syscall_error.rangeErrorMin = start;
@ -2869,8 +2869,8 @@ exception_t decodeARMMMUInvocation(word_t invLabel, word_t length, cptr_t cptr,
pdCap = pdCapSlot->cap;
if (unlikely(
cap_get_capType(pdCap) != cap_page_directory_cap ||
cap_page_directory_cap_get_capPDIsMapped(pdCap))) {
cap_get_capType(pdCap) != cap_page_directory_cap ||
cap_page_directory_cap_get_capPDIsMapped(pdCap))) {
userError("ASIDPoolAssign: Invalid page directory cap.");
current_syscall_error.type = seL4_InvalidCapability;
current_syscall_error.invalidCapNumber = 1;

2
src/arch/arm/32/object/objecttype.c
View file

@ -258,7 +258,7 @@ bool_t CONST Arch_sameRegionAs(cap_t cap_a, cap_t cap_b)
case cap_small_frame_cap:
case cap_frame_cap:
if (cap_get_capType(cap_b) == cap_small_frame_cap ||
cap_get_capType(cap_b) == cap_frame_cap) {
cap_get_capType(cap_b) == cap_frame_cap) {
word_t botA, botB, topA, topB;
botA = generic_frame_cap_get_capFBasePtr(cap_a);
botB = generic_frame_cap_get_capFBasePtr(cap_b);

46
src/arch/arm/64/kernel/vspace.c
View file

@ -182,11 +182,11 @@ static word_t CONST APFromVMRights(vm_rights_t vm_rights)
vm_rights_t CONST maskVMRights(vm_rights_t vm_rights, seL4_CapRights_t cap_rights_mask)
{
if (vm_rights == VMReadOnly &&
seL4_CapRights_get_capAllowRead(cap_rights_mask)) {
seL4_CapRights_get_capAllowRead(cap_rights_mask)) {
return VMReadOnly;
}
if (vm_rights == VMReadWrite &&
seL4_CapRights_get_capAllowRead(cap_rights_mask)) {
seL4_CapRights_get_capAllowRead(cap_rights_mask)) {
if (!seL4_CapRights_get_capAllowWrite(cap_rights_mask)) {
return VMReadOnly;
} else {
@ -194,8 +194,8 @@ vm_rights_t CONST maskVMRights(vm_rights_t vm_rights, seL4_CapRights_t cap_right
}
}
if (vm_rights == VMReadWrite &&
!seL4_CapRights_get_capAllowRead(cap_rights_mask) &&
seL4_CapRights_get_capAllowWrite(cap_rights_mask)) {
!seL4_CapRights_get_capAllowRead(cap_rights_mask) &&
seL4_CapRights_get_capAllowWrite(cap_rights_mask)) {
userError("Attempted to make unsupported write only mapping");
}
return VMKernelOnly;
@ -490,8 +490,8 @@ BOOT_CODE cap_t create_it_address_space(cap_t root_cnode_cap, v_region_t it_v_re
/* Create any PUDs needed for the user land image */
for (vptr = ROUND_DOWN(it_v_reg.start, PGD_INDEX_OFFSET);
vptr < it_v_reg.end;
vptr += BIT(PGD_INDEX_OFFSET)) {
vptr < it_v_reg.end;
vptr += BIT(PGD_INDEX_OFFSET)) {
pptr = alloc_region(seL4_PUDBits);
if (!pptr) {
return cap_null_cap_new();
@ -504,8 +504,8 @@ BOOT_CODE cap_t create_it_address_space(cap_t root_cnode_cap, v_region_t it_v_re
/* Create any PDs needed for the user land image */
for (vptr = ROUND_DOWN(it_v_reg.start, PUD_INDEX_OFFSET);
vptr < it_v_reg.end;
vptr += BIT(PUD_INDEX_OFFSET)) {
vptr < it_v_reg.end;
vptr += BIT(PUD_INDEX_OFFSET)) {
pptr = alloc_region(seL4_PageDirBits);
if (!pptr) {
return cap_null_cap_new();
@ -518,8 +518,8 @@ BOOT_CODE cap_t create_it_address_space(cap_t root_cnode_cap, v_region_t it_v_re
/* Create any PTs needed for the user land image */
for (vptr = ROUND_DOWN(it_v_reg.start, PD_INDEX_OFFSET);
vptr < it_v_reg.end;
vptr += BIT(PD_INDEX_OFFSET)) {
vptr < it_v_reg.end;
vptr += BIT(PD_INDEX_OFFSET)) {
pptr = alloc_region(seL4_PageTableBits);
if (!pptr) {
return cap_null_cap_new();
@ -1023,8 +1023,8 @@ static bool_t setVMRootForFlush(vspace_root_t *vspace, asid_t asid)
threadRoot = TCB_PTR_CTE_PTR(NODE_STATE(ksCurThread), tcbVTable)->cap;
if (cap_get_capType(threadRoot) == cap_page_global_directory_cap &&
cap_page_global_directory_cap_get_capPGDIsMapped(threadRoot) &&
PGD_PTR(cap_page_global_directory_cap_get_capPGDBasePtr(threadRoot)) == vspace) {
cap_page_global_directory_cap_get_capPGDIsMapped(threadRoot) &&
PGD_PTR(cap_page_global_directory_cap_get_capPGDBasePtr(threadRoot)) == vspace) {
return false;
}
@ -1044,7 +1044,7 @@ pgde_t *pageUpperDirectoryMapped(asid_t asid, vptr_t vaddr, pude_t *pud)
lu_ret = lookupPGDSlot(find_ret.vspace_root, vaddr);
if (pgde_pgde_pud_ptr_get_present(lu_ret.pgdSlot) &&
(pgde_pgde_pud_ptr_get_pud_base_address(lu_ret.pgdSlot) == pptr_to_paddr(pud))) {
(pgde_pgde_pud_ptr_get_pud_base_address(lu_ret.pgdSlot) == pptr_to_paddr(pud))) {
return lu_ret.pgdSlot;
}
@ -1067,7 +1067,7 @@ pude_t *pageDirectoryMapped(asid_t asid, vptr_t vaddr, pde_t *pd)
}
if (pude_pude_pd_ptr_get_present(lu_ret.pudSlot) &&
(pude_pude_pd_ptr_get_pd_base_address(lu_ret.pudSlot) == pptr_to_paddr(pd))) {
(pude_pude_pd_ptr_get_pd_base_address(lu_ret.pudSlot) == pptr_to_paddr(pd))) {
return lu_ret.pudSlot;
}
@ -1129,8 +1129,8 @@ static hw_asid_t findFreeHWASID(void)
/* Find a free hardware ASID */
for (hw_asid_offset = 0;
hw_asid_offset <= (word_t)((hw_asid_t) - 1);
hw_asid_offset++) {
hw_asid_offset <= (word_t)((hw_asid_t) - 1);
hw_asid_offset++) {
hw_asid = armKSNextASID + ((hw_asid_t)hw_asid_offset);
if (armKSHWASIDTable[hw_asid] == asidInvalid) {
return hw_asid;
@ -1229,7 +1229,7 @@ pde_t *pageTableMapped(asid_t asid, vptr_t vaddr, pte_t *pt)
}
if (pde_pde_small_ptr_get_present(lu_ret.pdSlot) &&
(pde_pde_small_ptr_get_pt_base_address(lu_ret.pdSlot) == pptr_to_paddr(pt))) {
(pde_pde_small_ptr_get_pt_base_address(lu_ret.pdSlot) == pptr_to_paddr(pt))) {
return lu_ret.pdSlot;
}
@ -1296,7 +1296,7 @@ void unmapPage(vm_page_size_t page_size, asid_t asid, vptr_t vptr, pptr_t pptr)
}
if (pte_ptr_get_present(lu_ret.ptSlot) &&
pte_ptr_get_page_base_address(lu_ret.ptSlot) == addr) {
pte_ptr_get_page_base_address(lu_ret.ptSlot) == addr) {
*(lu_ret.ptSlot) = pte_invalid_new();
cleanByVA_PoU((vptr_t)lu_ret.ptSlot, pptr_to_paddr(lu_ret.ptSlot));
@ -1313,7 +1313,7 @@ void unmapPage(vm_page_size_t page_size, asid_t asid, vptr_t vptr, pptr_t pptr)
}
if (pde_pde_large_ptr_get_present(lu_ret.pdSlot) &&
pde_pde_large_ptr_get_page_base_address(lu_ret.pdSlot) == addr) {
pde_pde_large_ptr_get_page_base_address(lu_ret.pdSlot) == addr) {
*(lu_ret.pdSlot) = pde_invalid_new();
cleanByVA_PoU((vptr_t)lu_ret.pdSlot, pptr_to_paddr(lu_ret.pdSlot));
@ -1330,7 +1330,7 @@ void unmapPage(vm_page_size_t page_size, asid_t asid, vptr_t vptr, pptr_t pptr)
}
if (pude_pude_1g_ptr_get_present(lu_ret.pudSlot) &&
pude_pude_1g_ptr_get_page_base_address(lu_ret.pudSlot) == addr) {
pude_pude_1g_ptr_get_page_base_address(lu_ret.pudSlot) == addr) {
*(lu_ret.pudSlot) = pude_invalid_new();
cleanByVA_PoU((vptr_t)lu_ret.pudSlot, pptr_to_paddr(lu_ret.pudSlot));
@ -2118,7 +2118,7 @@ static exception_t decodeARMFrameInvocation(word_t invLabel, unsigned int length
}
if (pde_pde_small_ptr_get_present(lu_ret.pdSlot) ||
pde_pde_large_ptr_get_present(lu_ret.pdSlot)) {
pde_pde_large_ptr_get_present(lu_ret.pdSlot)) {
current_syscall_error.type = seL4_DeleteFirst;
return EXCEPTION_SYSCALL_ERROR;
}
@ -2137,7 +2137,7 @@ static exception_t decodeARMFrameInvocation(word_t invLabel, unsigned int length
}
if (pude_pude_pd_ptr_get_present(lu_ret.pudSlot) ||
pude_pude_1g_ptr_get_present(lu_ret.pudSlot)) {
pude_pude_1g_ptr_get_present(lu_ret.pudSlot)) {
current_syscall_error.type = seL4_DeleteFirst;
return EXCEPTION_SYSCALL_ERROR;
}
@ -2365,7 +2365,7 @@ exception_t decodeARMMMUInvocation(word_t invLabel, word_t length, cptr_t cptr,
if (unlikely(cap_get_capType(untyped) != cap_untyped_cap ||
cap_untyped_cap_get_capBlockSize(untyped) != seL4_ASIDPoolBits) ||
cap_untyped_cap_get_capIsDevice(untyped)) {
cap_untyped_cap_get_capIsDevice(untyped)) {
current_syscall_error.type = seL4_InvalidCapability;
current_syscall_error.invalidCapNumber = 1;

2
src/arch/arm/64/machine/fpu.c
View file

@ -37,7 +37,7 @@ BOOT_CODE bool_t fpsimd_HWCapTest(void)
/* Check if the hardware has FP and ASIMD support... */
MRS("id_aa64pfr0_el1", id_aa64pfr0);
if ((id_aa64pfr0 >> ID_AA64PFR0_EL1_FP) & MASK(4) ||
(id_aa64pfr0 >> ID_AA64PFR0_EL1_ASIMD) & MASK(4)) {
(id_aa64pfr0 >> ID_AA64PFR0_EL1_ASIMD) & MASK(4)) {
return false;
}

6
src/arch/arm/kernel/boot.c
View file

@ -433,7 +433,7 @@ static BOOT_CODE bool_t try_init_kernel(
if (config_set(CONFIG_ARM_SMMU)) {
ndks_boot.bi_frame->ioSpaceCaps = create_iospace_caps(root_cnode_cap);
if (ndks_boot.bi_frame->ioSpaceCaps.start == 0 &&
ndks_boot.bi_frame->ioSpaceCaps.end == 0) {
ndks_boot.bi_frame->ioSpaceCaps.end == 0) {
return false;
}
} else {
@ -511,11 +511,11 @@ static BOOT_CODE bool_t try_init_kernel(
/* create all of the untypeds. Both devices and kernel window memory */
if (!create_untypeds(
root_cnode_cap,
root_cnode_cap,
(region_t) {
kernelBase, (pptr_t)ki_boot_end
} /* reusable boot code/data */
)) {
)) {
return false;
}

4
src/arch/arm/machine/debug.c
View file

@ -1141,7 +1141,7 @@ seL4_Fault_t handleUserLevelDebugException(word_t fault_vaddr)
}
if (method_of_entry != DEBUG_ENTRY_EXPLICIT_BKPT
&& bp_reason != seL4_SingleStep) {
&& bp_reason != seL4_SingleStep) {
active_bp = getAndResetActiveBreakpoint(bp_vaddr,
bp_reason);
assert(active_bp >= 0);
@ -1269,7 +1269,7 @@ static void loadBreakpointState(tcb_t *t)
for (i = 0; i < seL4_NumExclusiveWatchpoints; i++) {
if (t->tcbArch.tcbContext.breakpointState.used_breakpoints_bf &
BIT(i + seL4_NumExclusiveBreakpoints)) {
BIT(i + seL4_NumExclusiveBreakpoints)) {
writeWvrCp(i, readWvrContext(t, i));
writeWcrCp(i, readWcrContext(t, i));
} else {

12
src/arch/arm/machine/l2c_310.c
View file

@ -387,8 +387,8 @@ void plat_cleanL2Range(paddr_t start, paddr_t end)
assert(((l2cc->id.cache_type >> 12) & 0x3) == 0x0);
for (start = L2_LINE_START(start);
start != L2_LINE_START(end + L2_LINE_SIZE);
start += L2_LINE_SIZE) {
start != L2_LINE_START(end + L2_LINE_SIZE);
start += L2_LINE_SIZE) {
l2cc->maintenance.clean_pa = start;
/* do not need to wait for every invalidate as 310 is atomic */
}
@ -406,8 +406,8 @@ void plat_invalidateL2Range(paddr_t start, paddr_t end)
* has already done the clean, so we just blindly invalidate all the lines */
for (start = L2_LINE_START(start);
start != L2_LINE_START(end + L2_LINE_SIZE);
start += L2_LINE_SIZE) {
start != L2_LINE_START(end + L2_LINE_SIZE);
start += L2_LINE_SIZE) {
l2cc->maintenance.inv_pa = start;
/* do not need to wait for every invalidate as 310 is atomic */
}
@ -422,8 +422,8 @@ void plat_cleanInvalidateL2Range(paddr_t start, paddr_t end)
assert(((l2cc->id.cache_type >> 12) & 0x3) == 0x0);
for (start = L2_LINE_START(start);
start != L2_LINE_START(end + L2_LINE_SIZE);
start += L2_LINE_SIZE) {
start != L2_LINE_START(end + L2_LINE_SIZE);
start += L2_LINE_SIZE) {
/* Work around an errata and call the clean and invalidate separately */
l2cc->maintenance.clean_pa = start;
dmb();

8
src/arch/arm/object/iospace.c
View file

@ -73,7 +73,7 @@ static lookupIOPTSlot_ret_t lookupIOPTSlot(iopde_t *iopd, word_t io_address)
}
if (!isIOPDEValid(pd_ret.iopdSlot) ||
iopde_ptr_get_page_size(pd_ret.iopdSlot) != iopde_iopde_pt) {
iopde_ptr_get_page_size(pd_ret.iopdSlot) != iopde_iopde_pt) {
pt_ret.status = EXCEPTION_LOOKUP_FAULT;
pt_ret.ioptSlot = 0;
return pt_ret;
@ -326,7 +326,7 @@ exception_t decodeARMIOMapInvocation(
);
} else if (frame_cap_rights == VMReadWrite) {
if (seL4_CapRights_get_capAllowRead(dma_cap_rights_mask) &&
!seL4_CapRights_get_capAllowWrite(dma_cap_rights_mask)) {
!seL4_CapRights_get_capAllowWrite(dma_cap_rights_mask)) {
/* read only */
iopte = iopte_new(
1, /* read */
@ -395,8 +395,8 @@ void deleteIOPageTable(cap_t io_pt_cap)
}
if (isIOPDEValid(lu_ret.iopdSlot) &&
iopde_ptr_get_page_size(lu_ret.iopdSlot) == iopde_iopde_pt &&
iopde_iopde_pt_ptr_get_address(lu_ret.iopdSlot) != (pptr_to_paddr((void *)cap_io_page_table_cap_get_capIOPTBasePtr(io_pt_cap)))) {
iopde_ptr_get_page_size(lu_ret.iopdSlot) == iopde_iopde_pt &&
iopde_iopde_pt_ptr_get_address(lu_ret.iopdSlot) != (pptr_to_paddr((void *)cap_io_page_table_cap_get_capIOPTBasePtr(io_pt_cap)))) {
return;
}

4
src/arch/riscv/kernel/boot.c
View file

@ -336,8 +336,8 @@ static BOOT_CODE bool_t try_init_kernel(
/* convert the remaining free memory into UT objects and provide the caps */
if (!create_untypeds(
root_cnode_cap,
boot_mem_reuse_reg)) {
root_cnode_cap,
boot_mem_reuse_reg)) {
return false;
}

18
src/arch/riscv/kernel/vspace.c
View file

@ -261,8 +261,8 @@ BOOT_CODE cap_t create_it_address_space(cap_t root_cnode_cap, v_region_t it_v_re
for (int i = 2; i <= CONFIG_PT_LEVELS; i++) {
for (pt_vptr = ROUND_DOWN(it_v_reg.start, RISCV_GET_LVL_PGSIZE_BITS(i - 1));
pt_vptr < it_v_reg.end;
pt_vptr += RISCV_GET_LVL_PGSIZE(i - 1)) {
pt_vptr < it_v_reg.end;
pt_vptr += RISCV_GET_LVL_PGSIZE(i - 1)) {
pt_pptr = alloc_region(PT_SIZE_BITS);
if (!pt_pptr) {
@ -549,7 +549,7 @@ void unmapPage(vm_page_size_t page_size, asid_t asid, vptr_t vptr, pptr_t pptr)
return;
}
if (!pte_ptr_get_valid(lu_ret.ptSlot) || isPTEPageTable(lu_ret.ptSlot)
|| (pte_ptr_get_ppn(lu_ret.ptSlot) << seL4_PageBits) != pptr_to_paddr((void *)pptr)) {
|| (pte_ptr_get_ppn(lu_ret.ptSlot) << seL4_PageBits) != pptr_to_paddr((void *)pptr)) {
return;
}
@ -616,11 +616,11 @@ exception_t checkValidIPCBuffer(vptr_t vptr, cap_t cap)
vm_rights_t CONST maskVMRights(vm_rights_t vm_rights, seL4_CapRights_t cap_rights_mask)
{
if (vm_rights == VMReadOnly &&
seL4_CapRights_get_capAllowRead(cap_rights_mask)) {
seL4_CapRights_get_capAllowRead(cap_rights_mask)) {
return VMReadOnly;
}
if (vm_rights == VMReadWrite &&
(seL4_CapRights_get_capAllowRead(cap_rights_mask) || seL4_CapRights_get_capAllowWrite(cap_rights_mask))) {
(seL4_CapRights_get_capAllowRead(cap_rights_mask) || seL4_CapRights_get_capAllowWrite(cap_rights_mask))) {
if (!seL4_CapRights_get_capAllowWrite(cap_rights_mask)) {
return VMReadOnly;
} else if (!seL4_CapRights_get_capAllowRead(cap_rights_mask)) {
@ -630,7 +630,7 @@ vm_rights_t CONST maskVMRights(vm_rights_t vm_rights, seL4_CapRights_t cap_right
}
}
if (vm_rights == VMWriteOnly &&
seL4_CapRights_get_capAllowWrite(cap_rights_mask)) {
seL4_CapRights_get_capAllowWrite(cap_rights_mask)) {
return VMWriteOnly;
}
if (vm_rights == VMKernelOnly) {
@ -994,7 +994,7 @@ exception_t decodeRISCVMMUInvocation(word_t label, unsigned int length, cptr_t c
}
if (length < 2 || extraCaps.excaprefs[0] == NULL
|| extraCaps.excaprefs[1] == NULL) {
|| extraCaps.excaprefs[1] == NULL) {
current_syscall_error.type = seL4_TruncatedMessage;
return EXCEPTION_SYSCALL_ERROR;
}
@ -1018,8 +1018,8 @@ exception_t decodeRISCVMMUInvocation(word_t label, unsigned int length, cptr_t c
asid_base = i << asidLowBits;
if (cap_get_capType(untyped) != cap_untyped_cap ||
cap_untyped_cap_get_capBlockSize(untyped) != seL4_ASIDPoolBits ||
cap_untyped_cap_get_capIsDevice(untyped)) {
cap_untyped_cap_get_capBlockSize(untyped) != seL4_ASIDPoolBits ||
cap_untyped_cap_get_capIsDevice(untyped)) {
current_syscall_error.type = seL4_InvalidCapability;
current_syscall_error.invalidCapNumber = 1;

2
src/arch/riscv/object/objecttype.c
View file

@ -164,7 +164,7 @@ bool_t CONST Arch_sameRegionAs(cap_t cap_a, cap_t cap_b)
bool_t CONST Arch_sameObjectAs(cap_t cap_a, cap_t cap_b)
{
if ((cap_get_capType(cap_a) == cap_frame_cap) &&
(cap_get_capType(cap_b) == cap_frame_cap)) {
(cap_get_capType(cap_b) == cap_frame_cap)) {
return ((cap_frame_cap_get_capFBasePtr(cap_a) ==
cap_frame_cap_get_capFBasePtr(cap_b)) &&
(cap_frame_cap_get_capFSize(cap_a) ==

4
src/arch/x86/32/kernel/vspace.c
View file

@ -455,8 +455,8 @@ BOOT_CODE cap_t create_it_address_space(cap_t root_cnode_cap, v_region_t it_v_re
/* create all PT objs and caps necessary to cover userland image */
for (vptr = ROUND_DOWN(it_v_reg.start, PT_INDEX_BITS + PAGE_BITS);
vptr < it_v_reg.end;
vptr += BIT(PT_INDEX_BITS + PAGE_BITS)) {
vptr < it_v_reg.end;
vptr += BIT(PT_INDEX_BITS + PAGE_BITS)) {
pptr = alloc_region(seL4_PageTableBits);
if (!pptr) {
return cap_null_cap_new();

16
src/arch/x86/32/kernel/vspace_32paging.c
View file

@ -227,8 +227,8 @@ void unmapPageDirectory(asid_t asid, vptr_t vaddr, pde_t *pd)
static exception_t performIA32PageDirectoryGetStatusBits(lookupPTSlot_ret_t ptSlot, lookupPDSlot_ret_t pdSlot, word_t *buffer)
{
if (pdSlot.status == EXCEPTION_NONE &&
((pde_ptr_get_page_size(pdSlot.pdSlot) == pde_pde_large) &&
pde_pde_large_ptr_get_present(pdSlot.pdSlot))) {
((pde_ptr_get_page_size(pdSlot.pdSlot) == pde_pde_large) &&
pde_pde_large_ptr_get_present(pdSlot.pdSlot))) {
setMR(NODE_STATE(ksCurThread), buffer, 0, pde_pde_large_ptr_get_accessed(pdSlot.pdSlot));
setMR(NODE_STATE(ksCurThread), buffer, 1, pde_pde_large_ptr_get_dirty(pdSlot.pdSlot));
@ -285,10 +285,10 @@ exception_t decodeIA32PageDirectoryInvocation(
/* need either a valid PD mapping or PT mapping */
if ((pdSlot.status != EXCEPTION_NONE ||
((pde_ptr_get_page_size(pdSlot.pdSlot) != pde_pde_large) ||
!pde_pde_large_ptr_get_present(pdSlot.pdSlot))) &&
(ptSlot.status != EXCEPTION_NONE ||
(!pte_ptr_get_present(ptSlot.ptSlot)))) {
((pde_ptr_get_page_size(pdSlot.pdSlot) != pde_pde_large) ||
!pde_pde_large_ptr_get_present(pdSlot.pdSlot))) &&
(ptSlot.status != EXCEPTION_NONE ||
(!pte_ptr_get_present(ptSlot.ptSlot)))) {
userError("X86PageDirectoryGetStatusBits: No mapping found");
current_syscall_error.type = seL4_InvalidArgument;
@ -327,8 +327,8 @@ static readWordFromVSpace_ret_t readWordFromVSpace(vspace_root_t *vspace, word_t
pdSlot = lookupPDSlot(vspace, vaddr);
if (pdSlot.status == EXCEPTION_NONE &&
((pde_ptr_get_page_size(pdSlot.pdSlot) == pde_pde_large) &&
pde_pde_large_ptr_get_present(pdSlot.pdSlot))) {
((pde_ptr_get_page_size(pdSlot.pdSlot) == pde_pde_large) &&
pde_pde_large_ptr_get_present(pdSlot.pdSlot))) {
paddr = pde_pde_large_ptr_get_page_base_address(pdSlot.pdSlot);
offset = vaddr & MASK(seL4_LargePageBits);

2
src/arch/x86/64/c_traps.c
View file

@ -194,7 +194,7 @@ void VISIBLE NORETURN restore_user_context(void)
// There is a special case where if we would be returning from a sysenter,
// but are current singlestepping, do a full return like an interrupt
if (likely(cur_thread->tcbArch.tcbContext.registers[Error] == -1) &&
(!config_set(CONFIG_SYSENTER) || !config_set(CONFIG_HARDWARE_DEBUG_API) || ((cur_thread->tcbArch.tcbContext.registers[FLAGS] & FLAGS_TF) == 0))) {
(!config_set(CONFIG_SYSENTER) || !config_set(CONFIG_HARDWARE_DEBUG_API) || ((cur_thread->tcbArch.tcbContext.registers[FLAGS] & FLAGS_TF) == 0))) {
if (config_set(CONFIG_KERNEL_SKIM_WINDOW)) {
/* if we are using the SKIM window then we are trying to hide kernel state from
* the user in the case of Meltdown where the kernel region is effectively readable

48
src/arch/x86/64/kernel/vspace.c
View file

@ -94,7 +94,7 @@ BOOT_CODE bool_t map_kernel_window(
paddr = 0;
vaddr = PPTR_BASE;
for (paddr = 0; paddr < PADDR_TOP;
paddr += BIT(seL4_HugePageBits)) {
paddr += BIT(seL4_HugePageBits)) {
int pdpte_index = GET_PDPT_INDEX(vaddr);
x64KSKernelPDPT[pdpte_index] = pdpte_pdpte_1g_new(
@ -191,7 +191,7 @@ BOOT_CODE bool_t map_kernel_window(
vaddr = PPTR_BASE;
for (paddr = 0; paddr < PADDR_TOP;
paddr += 0x200000) {
paddr += 0x200000) {
int pd_index = GET_PDPT_INDEX(vaddr) - GET_PDPT_INDEX(PPTR_BASE);
int pde_index = GET_PD_INDEX(vaddr);
@ -483,7 +483,7 @@ void setVMRoot(tcb_t *tcb)
threadRoot = TCB_PTR_CTE_PTR(tcb, tcbVTable)->cap;
if (cap_get_capType(threadRoot) != cap_pml4_cap ||
!cap_pml4_cap_get_capPML4IsMapped(threadRoot)) {
!cap_pml4_cap_get_capPML4IsMapped(threadRoot)) {
setCurrentUserVSpaceRoot(kpptr_to_paddr(X86_GLOBAL_VSPACE_ROOT), 0);
return;
}
@ -705,8 +705,8 @@ BOOT_CODE cap_t create_it_address_space(cap_t root_cnode_cap, v_region_t it_v_re
/* Create any PDPTs needed for the user land image */
for (vptr = ROUND_DOWN(it_v_reg.start, PML4_INDEX_OFFSET);
vptr < it_v_reg.end;
vptr += BIT(PML4_INDEX_OFFSET)) {
vptr < it_v_reg.end;
vptr += BIT(PML4_INDEX_OFFSET)) {
pptr = alloc_region(seL4_PDPTBits);
if (!pptr) {
return cap_null_cap_new();
@ -721,8 +721,8 @@ BOOT_CODE cap_t create_it_address_space(cap_t root_cnode_cap, v_region_t it_v_re
/* Create any PDs needed for the user land image */
for (vptr = ROUND_DOWN(it_v_reg.start, PDPT_INDEX_OFFSET);
vptr < it_v_reg.end;
vptr += BIT(PDPT_INDEX_OFFSET)) {
vptr < it_v_reg.end;
vptr += BIT(PDPT_INDEX_OFFSET)) {
pptr = alloc_region(seL4_PageDirBits);
if (!pptr) {
return cap_null_cap_new();
@ -737,8 +737,8 @@ BOOT_CODE cap_t create_it_address_space(cap_t root_cnode_cap, v_region_t it_v_re
/* Create any PTs needed for the user land image */
for (vptr = ROUND_DOWN(it_v_reg.start, PD_INDEX_OFFSET);
vptr < it_v_reg.end;
vptr += BIT(PD_INDEX_OFFSET)) {
vptr < it_v_reg.end;
vptr += BIT(PD_INDEX_OFFSET)) {
pptr = alloc_region(seL4_PageTableBits);
if (!pptr) {
return cap_null_cap_new();
@ -1042,7 +1042,7 @@ lookupPDSlot_ret_t lookupPDSlot(vspace_root_t *pml4, vptr_t vptr)
return ret;
}
if ((pdpte_ptr_get_page_size(pdptSlot.pdptSlot) != pdpte_pdpte_pd) ||
!pdpte_pdpte_pd_ptr_get_present(pdptSlot.pdptSlot)) {
!pdpte_pdpte_pd_ptr_get_present(pdptSlot.pdptSlot)) {
current_lookup_fault = lookup_fault_missing_capability_new(PDPT_INDEX_OFFSET);
ret.pdSlot = NULL;
@ -1100,8 +1100,8 @@ void unmapPageDirectory(asid_t asid, vptr_t vaddr, pde_t *pd)
/* check if the PDPT has the PD */
if (!(pdpte_ptr_get_page_size(lu_ret.pdptSlot) == pdpte_pdpte_pd &&
pdpte_pdpte_pd_ptr_get_present(lu_ret.pdptSlot) &&
(pdpte_pdpte_pd_ptr_get_pd_base_address(lu_ret.pdptSlot) == pptr_to_paddr(pd)))) {
pdpte_pdpte_pd_ptr_get_present(lu_ret.pdptSlot) &&
(pdpte_pdpte_pd_ptr_get_pd_base_address(lu_ret.pdptSlot) == pptr_to_paddr(pd)))) {
return;
}
@ -1239,9 +1239,9 @@ static exception_t decodeX64PageDirectoryInvocation(
}
if ((pdpte_ptr_get_page_size(pdptSlot.pdptSlot) == pdpte_pdpte_pd &&
pdpte_pdpte_pd_ptr_get_present(pdptSlot.pdptSlot)) ||
(pdpte_ptr_get_page_size(pdptSlot.pdptSlot) == pdpte_pdpte_1g
&& pdpte_pdpte_1g_ptr_get_present(pdptSlot.pdptSlot))) {
pdpte_pdpte_pd_ptr_get_present(pdptSlot.pdptSlot)) ||
(pdpte_ptr_get_page_size(pdptSlot.pdptSlot) == pdpte_pdpte_1g
&& pdpte_pdpte_1g_ptr_get_present(pdptSlot.pdptSlot))) {
current_syscall_error.type = seL4_DeleteFirst;
return EXCEPTION_SYSCALL_ERROR;
@ -1272,7 +1272,7 @@ static void unmapPDPT(asid_t asid, vptr_t vaddr, pdpte_t *pdpt)
/* check if the PML4 has the PDPT */
if (!(pml4e_ptr_get_present(pml4Slot) &&
pml4e_ptr_get_pdpt_base_address(pml4Slot) == pptr_to_paddr(pdpt))) {
pml4e_ptr_get_pdpt_base_address(pml4Slot) == pptr_to_paddr(pdpt))) {
return;
}
@ -1452,9 +1452,9 @@ bool_t modeUnmapPage(vm_page_size_t page_size, vspace_root_t *vroot, vptr_t vadd
if (!(pdpte_ptr_get_page_size(pdpte) == pdpte_pdpte_1g
&& pdpte_pdpte_1g_ptr_get_present(pdpte)
&& (pdpte_pdpte_1g_ptr_get_page_base_address(pdpte)
== pptr_to_paddr(pptr)))) {
&& pdpte_pdpte_1g_ptr_get_present(pdpte)
&& (pdpte_pdpte_1g_ptr_get_page_base_address(pdpte)
== pptr_to_paddr(pptr)))) {
return false;
}
@ -1510,7 +1510,7 @@ static create_mapping_pdpte_return_t createSafeMappingEntries_PDPTE(paddr_t base
/* check for existing page directory */
if ((pdpte_ptr_get_page_size(ret.pdptSlot) == pdpte_pdpte_pd) &&
(pdpte_pdpte_pd_ptr_get_present(ret.pdptSlot))) {
(pdpte_pdpte_pd_ptr_get_present(ret.pdptSlot))) {
current_syscall_error.type = seL4_DeleteFirst;
ret.status = EXCEPTION_SYSCALL_ERROR;
return ret;
@ -1571,16 +1571,16 @@ static readWordFromVSpace_ret_t readWordFromVSpace(vspace_root_t *vspace, word_t
pdptSlot = lookupPDPTSlot(vspace, vaddr);
if (pdptSlot.status == EXCEPTION_NONE &&
pdpte_ptr_get_page_size(pdptSlot.pdptSlot) == pdpte_pdpte_1g &&
pdpte_pdpte_1g_ptr_get_present(pdptSlot.pdptSlot)) {
pdpte_ptr_get_page_size(pdptSlot.pdptSlot) == pdpte_pdpte_1g &&
pdpte_pdpte_1g_ptr_get_present(pdptSlot.pdptSlot)) {
paddr = pdpte_pdpte_1g_ptr_get_page_base_address(pdptSlot.pdptSlot);
offset = vaddr & MASK(seL4_HugePageBits);
} else {
pdSlot = lookupPDSlot(vspace, vaddr);
if (pdSlot.status == EXCEPTION_NONE &&
((pde_ptr_get_page_size(pdSlot.pdSlot) == pde_pde_large) &&
pde_pde_large_ptr_get_present(pdSlot.pdSlot))) {
((pde_ptr_get_page_size(pdSlot.pdSlot) == pde_pde_large) &&
pde_pde_large_ptr_get_present(pdSlot.pdSlot))) {
paddr = pde_pde_large_ptr_get_page_base_address(pdSlot.pdSlot);
offset = vaddr & MASK(seL4_LargePageBits);

2
src/arch/x86/kernel/boot.c
View file

@ -105,7 +105,7 @@ static UNUSED BOOT_CODE bool_t p_region_overlaps(p_region_t reg)
unsigned int i;
for (i = 0; i < allocated_p_regions.cur_pos; i++) {
if (allocated_p_regions.regs[i].start < reg.end &&
allocated_p_regions.regs[i].end > reg.start) {
allocated_p_regions.regs[i].end > reg.start) {
return true;
}
}

36
src/arch/x86/kernel/boot_sys.c
View file

@ -174,11 +174,11 @@ static BOOT_CODE bool_t try_boot_sys_node(cpu_id_t cpu_id)
p_region_t boot_mem_reuse_p_reg;
if (!map_kernel_window(
boot_state.num_ioapic,
boot_state.ioapic_paddr,
boot_state.num_drhu,
boot_state.drhu_list
)) {
boot_state.num_ioapic,
boot_state.ioapic_paddr,
boot_state.num_drhu,
boot_state.drhu_list
)) {
return false;
}
setCurrentVSpaceRoot(kpptr_to_paddr(X86_KERNEL_VSPACE_ROOT), 0);
@ -203,19 +203,19 @@ static BOOT_CODE bool_t try_boot_sys_node(cpu_id_t cpu_id)
/* initialise NDKS and kernel heap */
if (!init_sys_state(
cpu_id,
boot_state.mem_p_regs,
boot_state.ui_info,
boot_mem_reuse_p_reg,
/* parameters below not modeled in abstract specification */
boot_state.num_drhu,
boot_state.drhu_list,
&boot_state.rmrr_list,
&boot_state.acpi_rsdp,
&boot_state.vbe_info,
&boot_state.mb_mmap_info,
&boot_state.fb_info
)) {
cpu_id,
boot_state.mem_p_regs,
boot_state.ui_info,
boot_mem_reuse_p_reg,
/* parameters below not modeled in abstract specification */
boot_state.num_drhu,
boot_state.drhu_list,
&boot_state.rmrr_list,
&boot_state.acpi_rsdp,
&boot_state.vbe_info,
&boot_state.mb_mmap_info,
&boot_state.fb_info
)) {
return false;
}

34
src/arch/x86/kernel/ept.c
View file

@ -53,7 +53,7 @@ void deleteEPTASID(asid_t asid, ept_pml4e_t *ept)
if (poolPtr != NULL) {
asid_map_t asid_map = poolPtr->array[asid & MASK(asidLowBits)];
if (asid_map_get_type(asid_map) == asid_map_asid_map_ept &&
(ept_pml4e_t *)asid_map_asid_map_ept_get_ept_root(asid_map) == ept) {
(ept_pml4e_t *)asid_map_asid_map_ept_get_ept_root(asid_map) == ept) {
poolPtr->array[asid & MASK(asidLowBits)] = asid_map_asid_map_none_new();
}
}
@ -167,7 +167,7 @@ static lookupEPTPTSlot_ret_t lookupEPTPTSlot(ept_pml4e_t *pml4, vptr_t vptr)
}
if ((ept_pde_ptr_get_page_size(lu_ret.pdSlot) != ept_pde_ept_pde_pt) ||
!ept_pde_ept_pde_pt_ptr_get_read(lu_ret.pdSlot)) {
!ept_pde_ept_pde_pt_ptr_get_read(lu_ret.pdSlot)) {
current_lookup_fault = lookup_fault_missing_capability_new(22);
ret.ptSlot = NULL;
@ -189,9 +189,9 @@ static ept_cache_options_t eptCacheFromVmAttr(vm_attributes_t vmAttr)
verify user has specified a sensible option */
ept_cache_options_t option = vmAttr.words[0];
if (option != EPTUncacheable ||
option != EPTWriteCombining ||
option != EPTWriteThrough ||
option != EPTWriteBack) {
option != EPTWriteCombining ||
option != EPTWriteThrough ||
option != EPTWriteBack) {
/* No failure mode is supported here, vmAttr settings should be verified earlier */
option = EPTWriteBack;
}
@ -215,7 +215,7 @@ EPTPDPTMapped_ret_t EPTPDPTMapped(asid_t asid, vptr_t vptr, ept_pdpte_t *pdpt)
pml4Slot = lookupEPTPML4Slot(asid_ret.ept, vptr);
if (ept_pml4e_ptr_get_read(pml4Slot)
&& ptrFromPAddr(ept_pml4e_ptr_get_pdpt_base_address(pml4Slot)) == pdpt) {
&& ptrFromPAddr(ept_pml4e_ptr_get_pdpt_base_address(pml4Slot)) == pdpt) {
ret.pml4 = asid_ret.ept;
ret.pml4Slot = pml4Slot;
ret.status = EXCEPTION_NONE;
@ -413,7 +413,7 @@ EPTPageDirectoryMapped_ret_t EPTPageDirectoryMapped(asid_t asid, vptr_t vaddr, e
}
if (ept_pdpte_ptr_get_read(find_ret.pdptSlot)
&& ptrFromPAddr(ept_pdpte_ptr_get_pd_base_address(find_ret.pdptSlot)) == pd) {
&& ptrFromPAddr(ept_pdpte_ptr_get_pd_base_address(find_ret.pdptSlot)) == pd) {
ret.pml4 = asid_ret.ept;
ret.pdptSlot = find_ret.pdptSlot;
ret.status = EXCEPTION_NONE;
@ -601,7 +601,7 @@ EPTPageTableMapped_ret_t EPTPageTableMapped(asid_t asid, vptr_t vaddr, ept_pte_t
}
if (ept_pde_ptr_get_page_size(find_ret.pdSlot) == ept_pde_ept_pde_pt
&& ptrFromPAddr(ept_pde_ept_pde_pt_ptr_get_pt_base_address(find_ret.pdSlot)) == pt) {
&& ptrFromPAddr(ept_pde_ept_pde_pt_ptr_get_pt_base_address(find_ret.pdSlot)) == pt) {
ret.pml4 = asid_ret.ept;
ret.pdSlot = find_ret.pdSlot;
ret.status = EXCEPTION_NONE;
@ -709,7 +709,7 @@ exception_t decodeX86EPTPTInvocation(
pml4Cap = excaps.excaprefs[0]->cap;
if (cap_get_capType(pml4Cap) != cap_ept_pml4_cap ||
!cap_ept_pml4_cap_get_capPML4IsMapped(pml4Cap)) {
!cap_ept_pml4_cap_get_capPML4IsMapped(pml4Cap)) {
userError("X86EPTPTMap: Not a valid EPT pml4.");
current_syscall_error.type = seL4_InvalidCapability;
current_syscall_error.invalidCapNumber = 1;
@ -744,9 +744,9 @@ exception_t decodeX86EPTPTInvocation(
}
if (((ept_pde_ptr_get_page_size(lu_ret.pdSlot) == ept_pde_ept_pde_pt) &&
ept_pde_ept_pde_pt_ptr_get_read(lu_ret.pdSlot)) ||
((ept_pde_ptr_get_page_size(lu_ret.pdSlot) == ept_pde_ept_pde_2m) &&
ept_pde_ept_pde_2m_ptr_get_read(lu_ret.pdSlot))) {
ept_pde_ept_pde_pt_ptr_get_read(lu_ret.pdSlot)) ||
((ept_pde_ptr_get_page_size(lu_ret.pdSlot) == ept_pde_ept_pde_2m) &&
ept_pde_ept_pde_2m_ptr_get_read(lu_ret.pdSlot))) {
userError("X86EPTPTMap: Page table already mapped here");
current_syscall_error.type = seL4_DeleteFirst;
return EXCEPTION_SYSCALL_ERROR;
@ -829,7 +829,7 @@ exception_t decodeX86EPTPageMap(
assert(cap_frame_cap_get_capFMapType(cap) == X86_MappingNone);
if (cap_get_capType(pml4Cap) != cap_ept_pml4_cap ||
!cap_ept_pml4_cap_get_capPML4IsMapped(pml4Cap)) {
!cap_ept_pml4_cap_get_capPML4IsMapped(pml4Cap)) {
userError("X86EPTPageMap: Attempting to map frame into invalid ept pml4.");
current_syscall_error.type = seL4_InvalidCapability;
current_syscall_error.invalidCapNumber = 1;
@ -918,20 +918,20 @@ exception_t decodeX86EPTPageMap(
if ((ept_pde_ptr_get_page_size(lu_ret.pdSlot) == ept_pde_ept_pde_pt) &&
ept_pde_ept_pde_pt_ptr_get_read(lu_ret.pdSlot)) {
ept_pde_ept_pde_pt_ptr_get_read(lu_ret.pdSlot)) {
userError("X86EPTPageMap: Page table already present.");
current_syscall_error.type = seL4_DeleteFirst;
return EXCEPTION_SYSCALL_ERROR;
}
if (LARGE_PAGE_BITS != EPT_PD_INDEX_OFFSET &&
(ept_pde_ptr_get_page_size(lu_ret.pdSlot + 1) == ept_pde_ept_pde_pt) &&
ept_pde_ept_pde_pt_ptr_get_read(lu_ret.pdSlot + 1)) {
(ept_pde_ptr_get_page_size(lu_ret.pdSlot + 1) == ept_pde_ept_pde_pt) &&
ept_pde_ept_pde_pt_ptr_get_read(lu_ret.pdSlot + 1)) {
userError("X86EPTPageMap: Page table already present.");
current_syscall_error.type = seL4_DeleteFirst;
return EXCEPTION_SYSCALL_ERROR;
}
if ((ept_pde_ptr_get_page_size(lu_ret.pdSlot) == ept_pde_ept_pde_2m) &&
ept_pde_ept_pde_2m_ptr_get_read(lu_ret.pdSlot)) {
ept_pde_ept_pde_2m_ptr_get_read(lu_ret.pdSlot)) {
userError("X86EPTPageMap: Mapping already present.");
current_syscall_error.type = seL4_DeleteFirst;
return EXCEPTION_SYSCALL_ERROR;

2
src/arch/x86/kernel/smp_sys.c
View file

@ -29,7 +29,7 @@ BOOT_CODE static void update_logical_id_mappings(void)
for (int i = 0; i < smp_aps_index; i++) {
if (apic_get_cluster(cpu_mapping.index_to_logical_id[getCurrentCPUIndex()]) ==
apic_get_cluster(cpu_mapping.index_to_logical_id[i])) {
apic_get_cluster(cpu_mapping.index_to_logical_id[i])) {
cpu_mapping.other_indexes_in_cluster[getCurrentCPUIndex()] |= BIT(i);
cpu_mapping.other_indexes_in_cluster[i] |= BIT(getCurrentCPUIndex());

30
src/arch/x86/kernel/vspace.c
View file

@ -86,7 +86,7 @@ void deleteASID(asid_t asid, vspace_root_t *vspace)
if (poolPtr != NULL) {
asid_map_t asid_map = poolPtr->array[asid & MASK(asidLowBits)];
if (asid_map_get_type(asid_map) == asid_map_asid_map_vspace &&
(vspace_root_t *)asid_map_asid_map_vspace_get_vspace_root(asid_map) == vspace) {
(vspace_root_t *)asid_map_asid_map_vspace_get_vspace_root(asid_map) == vspace) {
hwASIDInvalidate(asid, vspace);
poolPtr->array[asid & MASK(asidLowBits)] = asid_map_asid_map_none_new();
setVMRoot(NODE_STATE(ksCurThread));
@ -623,7 +623,7 @@ lookupPTSlot_ret_t lookupPTSlot(vspace_root_t *vspace, vptr_t vptr)
return ret;
}
if ((pde_ptr_get_page_size(pdSlot.pdSlot) != pde_pde_pt) ||
!pde_pde_pt_ptr_get_present(pdSlot.pdSlot)) {
!pde_pde_pt_ptr_get_present(pdSlot.pdSlot)) {
current_lookup_fault = lookup_fault_missing_capability_new(PAGE_BITS + PT_INDEX_BITS);
ret.ptSlot = NULL;
ret.status = EXCEPTION_LOOKUP_FAULT;
@ -721,8 +721,8 @@ void unmapPage(vm_page_size_t page_size, asid_t asid, vptr_t vptr, void *pptr)
return;
}
if (!(pte_ptr_get_present(lu_ret.ptSlot)
&& (pte_ptr_get_page_base_address(lu_ret.ptSlot)
== pptr_to_paddr(pptr)))) {
&& (pte_ptr_get_page_base_address(lu_ret.ptSlot)
== pptr_to_paddr(pptr)))) {
return;
}
*lu_ret.ptSlot = makeUserPTEInvalid();
@ -735,9 +735,9 @@ void unmapPage(vm_page_size_t page_size, asid_t asid, vptr_t vptr, void *pptr)
}
pde = pd_ret.pdSlot;
if (!(pde_ptr_get_page_size(pde) == pde_pde_large
&& pde_pde_large_ptr_get_present(pde)
&& (pde_pde_large_ptr_get_page_base_address(pde)
== pptr_to_paddr(pptr)))) {
&& pde_pde_large_ptr_get_present(pde)
&& (pde_pde_large_ptr_get_page_base_address(pde)
== pptr_to_paddr(pptr)))) {
return;
}
*pde = makeUserPDEInvalid();
@ -775,8 +775,8 @@ void unmapPageTable(asid_t asid, vptr_t vaddr, pte_t *pt)
/* check if the PD actually refers to the PT */
if (!(pde_ptr_get_page_size(lu_ret.pdSlot) == pde_pde_pt &&
pde_pde_pt_ptr_get_present(lu_ret.pdSlot) &&
(pde_pde_pt_ptr_get_pt_base_address(lu_ret.pdSlot) == pptr_to_paddr(pt)))) {
pde_pde_pt_ptr_get_present(lu_ret.pdSlot) &&
(pde_pde_pt_ptr_get_pt_base_address(lu_ret.pdSlot) == pptr_to_paddr(pt)))) {
return;
}
@ -921,7 +921,7 @@ static create_mapping_pde_return_t createSafeMappingEntries_PDE(paddr_t base, wo
/* check for existing page table */
if ((pde_ptr_get_page_size(ret.pdSlot) == pde_pde_pt) &&
(pde_pde_pt_ptr_get_present(ret.pdSlot))) {
(pde_pde_pt_ptr_get_present(ret.pdSlot))) {
current_syscall_error.type = seL4_DeleteFirst;
ret.status = EXCEPTION_SYSCALL_ERROR;
return ret;
@ -1346,7 +1346,7 @@ static exception_t decodeX86PageTableInvocation(
}
if (((pde_ptr_get_page_size(pdSlot.pdSlot) == pde_pde_pt) && pde_pde_pt_ptr_get_present(pdSlot.pdSlot)) ||
((pde_ptr_get_page_size(pdSlot.pdSlot) == pde_pde_large) && pde_pde_large_ptr_get_present(pdSlot.pdSlot))) {
((pde_ptr_get_page_size(pdSlot.pdSlot) == pde_pde_large) && pde_pde_large_ptr_get_present(pdSlot.pdSlot))) {
current_syscall_error.type = seL4_DeleteFirst;
return EXCEPTION_SYSCALL_ERROR;
@ -1401,7 +1401,7 @@ exception_t decodeX86MMUInvocation(
}
if (length < 2 || excaps.excaprefs[0] == NULL
|| excaps.excaprefs[1] == NULL) {
|| excaps.excaprefs[1] == NULL) {
current_syscall_error.type = seL4_TruncatedMessage;
return EXCEPTION_SYSCALL_ERROR;
}
@ -1426,8 +1426,8 @@ exception_t decodeX86MMUInvocation(
if (cap_get_capType(untyped) != cap_untyped_cap ||
cap_untyped_cap_get_capBlockSize(untyped) != seL4_ASIDPoolBits ||
cap_untyped_cap_get_capIsDevice(untyped)) {
cap_untyped_cap_get_capBlockSize(untyped) != seL4_ASIDPoolBits ||
cap_untyped_cap_get_capIsDevice(untyped)) {
current_syscall_error.type = seL4_InvalidCapability;
current_syscall_error.invalidCapNumber = 1;
@ -1478,7 +1478,7 @@ exception_t decodeX86MMUInvocation(
vspaceCap = vspaceCapSlot->cap;
if (!(isVTableRoot(vspaceCap) || VTX_TERNARY(cap_get_capType(vspaceCap) == cap_ept_pml4_cap, 0))
|| cap_get_capMappedASID(vspaceCap) != asidInvalid) {
|| cap_get_capMappedASID(vspaceCap) != asidInvalid) {
userError("X86ASIDPool: Invalid vspace root.");
current_syscall_error.type = seL4_InvalidCapability;
current_syscall_error.invalidCapNumber = 1;

4
src/arch/x86/kernel/x2apic.c
View file

@ -19,8 +19,8 @@ BOOT_CODE bool_t x2apic_is_enabled(void)
apic_base_msr.words[0] = x86_rdmsr_low(IA32_APIC_BASE_MSR);
if ((x86_cpuid_ecx(1, 0) & BIT(21)) &&
apic_base_msr_get_enabled(apic_base_msr) &&
apic_base_msr_get_x2apic(apic_base_msr)) {
apic_base_msr_get_enabled(apic_base_msr) &&
apic_base_msr_get_x2apic(apic_base_msr)) {
return true;
}
return false;

4
src/arch/x86/machine/breakpoint.c
View file

@ -652,13 +652,13 @@ BOOT_CODE bool_t Arch_initHardwareBreakpoints(void)
/* Intel manuals, vol3, section 17.2.4, "NOTES". */
if (modelinfo->family == 15) {
if (modelinfo->model == 3 || modelinfo->model == 4
|| modelinfo->model == 6) {
|| modelinfo->model == 6) {
byte8_bps_supported = true;
}
}
if (modelinfo->family == 6) {
if (modelinfo->model == 15 || modelinfo->model == 23
|| modelinfo->model == 0x1C) {
|| modelinfo->model == 0x1C) {
byte8_bps_supported = true;
}
}

6
src/arch/x86/machine/hardware.c
View file

@ -79,8 +79,8 @@ void flushCacheRange(void *vaddr, uint32_t size_bits)
x86_mfence();
for (v = ROUND_DOWN((word_t)vaddr, x86KScacheLineSizeBits);
v < (word_t)vaddr + BIT(size_bits);
v += BIT(x86KScacheLineSizeBits)) {
v < (word_t)vaddr + BIT(size_bits);
v += BIT(x86KScacheLineSizeBits)) {
flushCacheLine((void *)v);
}
x86_mfence();
@ -116,7 +116,7 @@ BOOT_CODE bool_t disablePrefetchers()
* there is no need to also look at the model_ID.
*/
if (model_info->family == IA32_PREFETCHER_COMPATIBLE_FAMILIES_ID
&& model_info->model == valid_models[i]) {
&& model_info->model == valid_models[i]) {
low = x86_rdmsr_low(IA32_PREFETCHER_MSR);
high = x86_rdmsr_high(IA32_PREFETCHER_MSR);

2
src/arch/x86/object/interrupt.c
View file

@ -22,7 +22,7 @@ void Arch_irqStateInit(void)
for (i = 0; i <= maxIRQ; i++) {
if (i == irq_timer
#ifdef CONFIG_IOMMU
|| i == irq_iommu
|| i == irq_iommu
#endif
) {
x86KSIRQState[i] = x86_irq_state_irq_reserved_new();

10
src/arch/x86/object/objecttype.c
View file

@ -152,9 +152,9 @@ cap_t CONST Arch_updateCapData(bool_t preserve, word_t data, cap_t cap)
uint16_t PCIDevice = io_space_capdata_get_PCIDevice(w);
uint16_t domainID = io_space_capdata_get_domainID(w);
if (!preserve && cap_io_space_cap_get_capPCIDevice(cap) == 0 &&
domainID >= x86KSFirstValidIODomain &&
domainID != 0 &&
domainID <= MASK(x86KSnumIODomainIDBits)) {
domainID >= x86KSFirstValidIODomain &&
domainID != 0 &&
domainID <= MASK(x86KSnumIODomainIDBits)) {
return cap_io_space_cap_new(domainID, PCIDevice);
} else {
return cap_null_cap_new();
@ -336,7 +336,7 @@ bool_t CONST Arch_sameRegionAs(cap_t cap_a, cap_t cap_b)
case cap_io_port_control_cap:
if (cap_get_capType(cap_b) == cap_io_port_control_cap ||
cap_get_capType(cap_b) == cap_io_port_cap) {
cap_get_capType(cap_b) == cap_io_port_cap) {
return true;
}
break;
@ -412,7 +412,7 @@ bool_t CONST Arch_sameRegionAs(cap_t cap_a, cap_t cap_b)
bool_t CONST Arch_sameObjectAs(cap_t cap_a, cap_t cap_b)
{
if (cap_get_capType(cap_a) == cap_io_port_control_cap &&
cap_get_capType(cap_b) == cap_io_port_cap) {
cap_get_capType(cap_b) == cap_io_port_cap) {
return false;
}
if (cap_get_capType(cap_a) == cap_frame_cap) {

8
src/arch/x86/object/vcpu.c
View file

@ -1198,7 +1198,7 @@ exception_t handleVmexit(void)
* bits that the VCPU owner has declared that they want to own (via the cr0_shadow)
*/
if (!((value ^ NODE_STATE(ksCurThread)->tcbArch.tcbVCPU->cr0_shadow) &
NODE_STATE(ksCurThread)->tcbArch.tcbVCPU->cr0_mask)) {
NODE_STATE(ksCurThread)->tcbArch.tcbVCPU->cr0_mask)) {
return EXCEPTION_NONE;
}
}
@ -1223,7 +1223,7 @@ exception_t handleVmexit(void)
* the low 4 bits
*/
if (!((value ^ NODE_STATE(ksCurThread)->tcbArch.tcbVCPU->cr0_shadow) &
NODE_STATE(ksCurThread)->tcbArch.tcbVCPU->cr0_mask & MASK(4))) {
NODE_STATE(ksCurThread)->tcbArch.tcbVCPU->cr0_mask & MASK(4))) {
return EXCEPTION_NONE;
}
break;
@ -1283,7 +1283,7 @@ void VMCheckBoundNotification(tcb_t *tcb)
assert(tcb->tcbAffinity == getCurrentCPUIndex());
notification_t *ntfnPtr = tcb->tcbBoundNotification;
if (thread_state_ptr_get_tsType(&tcb->tcbState) == ThreadState_RunningVM
&& ntfnPtr && notification_ptr_get_state(ntfnPtr) == NtfnState_Active) {
&& ntfnPtr && notification_ptr_get_state(ntfnPtr) == NtfnState_Active) {
word_t badge = notification_ptr_get_ntfnMsgIdentifier(ntfnPtr);
notification_ptr_set_state(ntfnPtr, NtfnState_Idle);
@ -1315,7 +1315,7 @@ static void setEPTRoot(cap_t vmxSpace, vcpu_t *vcpu)
{
paddr_t ept_root;
if (cap_get_capType(vmxSpace) != cap_ept_pml4_cap ||
!cap_ept_pml4_cap_get_capPML4IsMapped(vmxSpace)) {
!cap_ept_pml4_cap_get_capPML4IsMapped(vmxSpace)) {
ept_root = kpptr_to_paddr(null_ept_space);
} else {
findEPTForASID_ret_t find_ret;

4
src/fastpath/fastpath.c
View file

@ -110,7 +110,7 @@ fastpath_call(word_t cptr, word_t msgInfo)
dom = maxDom ? ksCurDomain : 0;
/* ensure only the idle thread or lower prio threads are present in the scheduler */
if (likely(dest->tcbPriority < NODE_STATE(ksCurThread->tcbPriority)) &&
!isHighestPrio(dom, dest->tcbPriority)) {
!isHighestPrio(dom, dest->tcbPriority)) {
slowpath(SysCall);
}
@ -231,7 +231,7 @@ void fastpath_reply_recv(word_t cptr, word_t msgInfo)
/* Check there is nothing waiting on the notification */
if (NODE_STATE(ksCurThread)->tcbBoundNotification &&
notification_ptr_get_state(NODE_STATE(ksCurThread)->tcbBoundNotification) == NtfnState_Active) {
notification_ptr_get_state(NODE_STATE(ksCurThread)->tcbBoundNotification) == NtfnState_Active) {
slowpath(SysReplyRecv);
}

12
src/kernel/boot.c
View file

@ -68,7 +68,7 @@ BOOT_CODE pptr_t alloc_region(word_t size_bits)
for (i = 0; i < MAX_NUM_FREEMEM_REG; i++) {
/* Determine whether placing the region at the start or the end will create a bigger left over region */
if (ROUND_UP(ndks_boot.freemem[i].start, size_bits) - ndks_boot.freemem[i].start <
ndks_boot.freemem[i].end - ROUND_DOWN(ndks_boot.freemem[i].end, size_bits)) {
ndks_boot.freemem[i].end - ROUND_DOWN(ndks_boot.freemem[i].end, size_bits)) {
new_reg.start = ROUND_UP(ndks_boot.freemem[i].start, size_bits);
new_reg.end = new_reg.start + BIT(size_bits);
} else {
@ -76,8 +76,8 @@ BOOT_CODE pptr_t alloc_region(word_t size_bits)
new_reg.start = new_reg.end - BIT(size_bits);
}
if (new_reg.end > new_reg.start &&
new_reg.start >= ndks_boot.freemem[i].start &&
new_reg.end <= ndks_boot.freemem[i].end) {
new_reg.start >= ndks_boot.freemem[i].start &&
new_reg.end <= ndks_boot.freemem[i].end) {
if (new_reg.start - ndks_boot.freemem[i].start < ndks_boot.freemem[i].end - new_reg.end) {
new_rem_small.start = ndks_boot.freemem[i].start;
new_rem_small.end = new_reg.start;
@ -90,8 +90,8 @@ BOOT_CODE pptr_t alloc_region(word_t size_bits)
new_rem_small.end = ndks_boot.freemem[i].end;
}
if (is_reg_empty(reg) ||
(reg_size(new_rem_small) < reg_size(rem_small)) ||
(reg_size(new_rem_small) == reg_size(rem_small) && reg_size(new_rem_large) < reg_size(rem_large))) {
(reg_size(new_rem_small) < reg_size(rem_small)) ||
(reg_size(new_rem_small) == reg_size(rem_small) && reg_size(new_rem_large) < reg_size(rem_large))) {
reg = new_reg;
rem_small = new_rem_small;
rem_large = new_rem_large;
@ -473,7 +473,7 @@ BOOT_CODE void init_core_state(tcb_t *scheduler_action)
/* add initial threads to the debug queue */
NODE_STATE(ksDebugTCBs) = NULL;
if (scheduler_action != SchedulerAction_ResumeCurrentThread &&
scheduler_action != SchedulerAction_ChooseNewThread) {
scheduler_action != SchedulerAction_ChooseNewThread) {
tcbDebugAppend(scheduler_action);
}
tcbDebugAppend(NODE_STATE(ksIdleThread));

6
src/kernel/faulthandler.c
View file

@ -44,9 +44,9 @@ exception_t sendFaultIPC(tcb_t *tptr)
handlerCap = lu_ret.cap;
if (cap_get_capType(handlerCap) == cap_endpoint_cap &&
cap_endpoint_cap_get_capCanSend(handlerCap) &&
(cap_endpoint_cap_get_capCanGrant(handlerCap) ||
cap_endpoint_cap_get_capCanGrantReply(handlerCap))) {
cap_endpoint_cap_get_capCanSend(handlerCap) &&
(cap_endpoint_cap_get_capCanGrant(handlerCap) ||
cap_endpoint_cap_get_capCanGrantReply(handlerCap))) {
tptr->tcbFault = current_fault;
if (seL4_Fault_get_seL4_FaultType(current_fault) == seL4_Fault_CapFault) {
tptr->tcbLookupFailure = original_lookup_fault;

16
src/kernel/thread.c
View file

@ -203,7 +203,7 @@ static seL4_MessageInfo_t transferCaps(seL4_MessageInfo_t info, extra_caps_t cap
cap_t cap = slot->cap;
if (cap_get_capType(cap) == cap_endpoint_cap &&
EP_PTR(cap_endpoint_cap_get_capEPPtr(cap)) == endpoint) {
EP_PTR(cap_endpoint_cap_get_capEPPtr(cap)) == endpoint) {
/* If this is a cap to the endpoint on which the message was sent,
* only transfer the badge, not the cap. */
setExtraBadge(receiveBuffer,
@ -285,7 +285,7 @@ void schedule(void)
NODE_STATE(ksCurThread) == NODE_STATE(ksIdleThread)
|| (candidate->tcbPriority < NODE_STATE(ksCurThread)->tcbPriority);
if (fastfail &&
!isHighestPrio(ksCurDomain, candidate->tcbPriority)) {
!isHighestPrio(ksCurDomain, candidate->tcbPriority)) {
SCHED_ENQUEUE(candidate);
/* we can't, need to reschedule */
NODE_STATE(ksSchedulerAction) = SchedulerAction_ChooseNewThread;
@ -386,7 +386,7 @@ void setPriority(tcb_t *tptr, prio_t prio)
void possibleSwitchTo(tcb_t *target)
{
if (ksCurDomain != target->tcbDomain
SMP_COND_STATEMENT( || target->tcbAffinity != getCurrentCPUIndex())) {
SMP_COND_STATEMENT( || target->tcbAffinity != getCurrentCPUIndex())) {
SCHED_ENQUEUE(target);
} else if (NODE_STATE(ksSchedulerAction) != SchedulerAction_ResumeCurrentThread) {
/* Too many threads want special treatment, use regular queues. */
@ -406,8 +406,8 @@ void setThreadState(tcb_t *tptr, _thread_state_t ts)
void scheduleTCB(tcb_t *tptr)
{
if (tptr == NODE_STATE(ksCurThread) &&
NODE_STATE(ksSchedulerAction) == SchedulerAction_ResumeCurrentThread &&
!isRunnable(tptr)) {
NODE_STATE(ksSchedulerAction) == SchedulerAction_ResumeCurrentThread &&
!isRunnable(tptr)) {
rescheduleRequired();
}
}
@ -417,8 +417,8 @@ void timerTick(void)
if (likely(thread_state_get_tsType(NODE_STATE(ksCurThread)->tcbState) ==
ThreadState_Running)
#ifdef CONFIG_VTX
|| thread_state_get_tsType(NODE_STATE(ksCurThread)->tcbState) ==
ThreadState_RunningVM
|| thread_state_get_tsType(NODE_STATE(ksCurThread)->tcbState) ==
ThreadState_RunningVM
#endif
) {
if (NODE_STATE(ksCurThread)->tcbTimeSlice > 1) {
@ -441,7 +441,7 @@ void timerTick(void)
void rescheduleRequired(void)
{
if (NODE_STATE(ksSchedulerAction) != SchedulerAction_ResumeCurrentThread
&& NODE_STATE(ksSchedulerAction) != SchedulerAction_ChooseNewThread) {
&& NODE_STATE(ksSchedulerAction) != SchedulerAction_ChooseNewThread) {
SCHED_ENQUEUE(NODE_STATE(ksSchedulerAction));
}
NODE_STATE(ksSchedulerAction) = SchedulerAction_ChooseNewThread;

18
src/object/cnode.c
View file

@ -232,7 +232,7 @@ exception_t decodeCNodeInvocation(word_t invLabel, word_t length, cap_t cap,
cap_t pivotRoot, srcRoot, newSrcCap, newPivotCap;
if (length < 8 || excaps.excaprefs[0] == NULL
|| excaps.excaprefs[1] == NULL) {
|| excaps.excaprefs[1] == NULL) {
current_syscall_error.type = seL4_TruncatedMessage;
return EXCEPTION_SYSCALL_ERROR;
}
@ -390,11 +390,11 @@ exception_t invokeCNodeSaveCaller(cte_t *destSlot)
static void setUntypedCapAsFull(cap_t srcCap, cap_t newCap, cte_t *srcSlot)
{
if ((cap_get_capType(srcCap) == cap_untyped_cap)
&& (cap_get_capType(newCap) == cap_untyped_cap)) {
&& (cap_get_capType(newCap) == cap_untyped_cap)) {
if ((cap_untyped_cap_get_capPtr(srcCap)
== cap_untyped_cap_get_capPtr(newCap))
&& (cap_untyped_cap_get_capBlockSize(newCap)
== cap_untyped_cap_get_capBlockSize(srcCap))) {
== cap_untyped_cap_get_capPtr(newCap))
&& (cap_untyped_cap_get_capBlockSize(newCap)
== cap_untyped_cap_get_capBlockSize(srcCap))) {
cap_untyped_cap_ptr_set_capFreeIndex(&(srcSlot->cap),
MAX_FREE_INDEX(cap_untyped_cap_get_capBlockSize(srcCap)));
}
@ -527,8 +527,8 @@ exception_t cteRevoke(cte_t *slot)
/* there is no need to check for a NullCap as NullCaps are
always accompanied by null mdb pointers */
for (nextPtr = CTE_PTR(mdb_node_get_mdbNext(slot->cteMDBNode));
nextPtr && isMDBParentOf(slot, nextPtr);
nextPtr = CTE_PTR(mdb_node_get_mdbNext(slot->cteMDBNode))) {
nextPtr && isMDBParentOf(slot, nextPtr);
nextPtr = CTE_PTR(mdb_node_get_mdbNext(slot->cteMDBNode))) {
status = cteDelete(nextPtr, true);
if (status != EXCEPTION_NONE) {
return status;
@ -686,8 +686,8 @@ static exception_t reduceZombie(cte_t *slot, bool_t immediate)
(cte_t *)cap_zombie_cap_get_capZombiePtr(slot->cap);
if (ptr == ptr2 &&
cap_zombie_cap_get_capZombieNumber(slot->cap) == n &&
cap_zombie_cap_get_capZombieType(slot->cap) == type) {
cap_zombie_cap_get_capZombieNumber(slot->cap) == n &&
cap_zombie_cap_get_capZombieType(slot->cap) == type) {
assert(cap_get_capType(endSlot->cap) == cap_null_cap);
slot->cap =
cap_zombie_cap_set_capZombieNumber(slot->cap, n - 1);

4
src/object/interrupt.c
View file

@ -110,7 +110,7 @@ exception_t decodeIRQHandlerInvocation(word_t invLabel, irq_t irq,
slot = excaps.excaprefs[0];
if (cap_get_capType(ntfnCap) != cap_notification_cap ||
!cap_notification_cap_get_capNtfnCanSend(ntfnCap)) {
!cap_notification_cap_get_capNtfnCanSend(ntfnCap)) {
if (cap_get_capType(ntfnCap) != cap_notification_cap) {
userError("IRQSetHandler: provided cap is not an notification capability.");
} else {
@ -195,7 +195,7 @@ void handleInterrupt(irq_t irq)
cap = intStateIRQNode[irq].cap;
if (cap_get_capType(cap) == cap_notification_cap &&
cap_notification_cap_get_capNtfnCanSend(cap)) {
cap_notification_cap_get_capNtfnCanSend(cap)) {
sendSignal(NTFN_PTR(cap_notification_cap_get_capNtfnPtr(cap)),
cap_notification_cap_get_capNtfnBadge(cap));
} else {

6
src/object/objecttype.c
View file

@ -275,7 +275,7 @@ bool_t CONST sameRegionAs(cap_t cap_a, cap_t cap_b)
case cap_irq_control_cap:
if (cap_get_capType(cap_b) == cap_irq_control_cap ||
cap_get_capType(cap_b) == cap_irq_handler_cap) {
cap_get_capType(cap_b) == cap_irq_handler_cap) {
return true;
}
break;
@ -289,7 +289,7 @@ bool_t CONST sameRegionAs(cap_t cap_a, cap_t cap_b)
default:
if (isArchCap(cap_a) &&
isArchCap(cap_b)) {
isArchCap(cap_b)) {
return Arch_sameRegionAs(cap_a, cap_b);
}
break;
@ -304,7 +304,7 @@ bool_t CONST sameObjectAs(cap_t cap_a, cap_t cap_b)
return false;
}
if (cap_get_capType(cap_a) == cap_irq_control_cap &&
cap_get_capType(cap_b) == cap_irq_handler_cap) {
cap_get_capType(cap_b) == cap_irq_handler_cap) {
return false;
}
if (isArchCap(cap_a) && isArchCap(cap_b)) {

38
src/object/tcb.c
View file

@ -350,7 +350,7 @@ void remoteQueueUpdate(tcb_t *tcb)
/* reschedule if the target core is idle or we are waking a higher priority thread */
if (targetCurThread == NODE_STATE_ON_CORE(ksIdleThread, tcb->tcbAffinity) ||
tcb->tcbPriority > targetCurThread->tcbPriority) {
tcb->tcbPriority > targetCurThread->tcbPriority) {
ARCH_NODE_STATE(ipiReschedulePending) |= BIT(tcb->tcbAffinity);
}
}
@ -363,7 +363,7 @@ void remoteTCBStall(tcb_t *tcb)
{
if (tcb->tcbAffinity != getCurrentCPUIndex() &&
NODE_STATE_ON_CORE(ksCurThread, tcb->tcbAffinity) == tcb) {
NODE_STATE_ON_CORE(ksCurThread, tcb->tcbAffinity) == tcb) {
doRemoteStall(tcb->tcbAffinity);
ARCH_NODE_STATE(ipiReschedulePending) |= BIT(tcb->tcbAffinity);
}
@ -503,7 +503,7 @@ static exception_t decodeSetBreakpoint(cap_t cap, word_t *buffer)
return EXCEPTION_SYSCALL_ERROR;
}
if (bp_num >= seL4_FirstWatchpoint
&& seL4_FirstBreakpoint != seL4_FirstWatchpoint) {
&& seL4_FirstBreakpoint != seL4_FirstWatchpoint) {
userError("Debug: Can't specify a watchpoint ID with type seL4_InstructionBreakpoint.");
current_syscall_error.type = seL4_InvalidArgument;
current_syscall_error.invalidArgumentNumber = 2;
@ -531,7 +531,7 @@ static exception_t decodeSetBreakpoint(cap_t cap, word_t *buffer)
}
if (rw != seL4_BreakOnRead && rw != seL4_BreakOnWrite
&& rw != seL4_BreakOnReadWrite) {
&& rw != seL4_BreakOnReadWrite) {
userError("Debug: Unknown access-type %lu.", rw);
current_syscall_error.type = seL4_InvalidArgument;
current_syscall_error.invalidArgumentNumber = 3;
@ -901,8 +901,8 @@ exception_t decodeTCBConfigure(cap_t cap, word_t length, cte_t *slot,
word_t cRootData, vRootData, bufferAddr;
if (length < 4 || rootCaps.excaprefs[0] == NULL
|| rootCaps.excaprefs[1] == NULL
|| rootCaps.excaprefs[2] == NULL) {
|| rootCaps.excaprefs[1] == NULL
|| rootCaps.excaprefs[2] == NULL) {
userError("TCB Configure: Truncated message.");
current_syscall_error.type = seL4_TruncatedMessage;
return EXCEPTION_SYSCALL_ERROR;
@ -936,9 +936,9 @@ exception_t decodeTCBConfigure(cap_t cap, word_t length, cte_t *slot,
}
if (slotCapLongRunningDelete(
TCB_PTR_CTE_PTR(cap_thread_cap_get_capTCBPtr(cap), tcbCTable)) ||
slotCapLongRunningDelete(
TCB_PTR_CTE_PTR(cap_thread_cap_get_capTCBPtr(cap), tcbVTable))) {
TCB_PTR_CTE_PTR(cap_thread_cap_get_capTCBPtr(cap), tcbCTable)) ||
slotCapLongRunningDelete(
TCB_PTR_CTE_PTR(cap_thread_cap_get_capTCBPtr(cap), tcbVTable))) {
userError("TCB Configure: CSpace or VSpace currently being deleted.");
current_syscall_error.type = seL4_IllegalOperation;
return EXCEPTION_SYSCALL_ERROR;
@ -1159,7 +1159,7 @@ exception_t decodeSetSpace(cap_t cap, word_t length, cte_t *slot,
deriveCap_ret_t dc_ret;
if (length < 3 || excaps.excaprefs[0] == NULL
|| excaps.excaprefs[1] == NULL) {
|| excaps.excaprefs[1] == NULL) {
userError("TCB SetSpace: Truncated message.");
current_syscall_error.type = seL4_TruncatedMessage;
return EXCEPTION_SYSCALL_ERROR;
@ -1175,9 +1175,9 @@ exception_t decodeSetSpace(cap_t cap, word_t length, cte_t *slot,
vRootCap = excaps.excaprefs[1]->cap;
if (slotCapLongRunningDelete(
TCB_PTR_CTE_PTR(cap_thread_cap_get_capTCBPtr(cap), tcbCTable)) ||
slotCapLongRunningDelete(
TCB_PTR_CTE_PTR(cap_thread_cap_get_capTCBPtr(cap), tcbVTable))) {
TCB_PTR_CTE_PTR(cap_thread_cap_get_capTCBPtr(cap), tcbCTable)) ||
slotCapLongRunningDelete(
TCB_PTR_CTE_PTR(cap_thread_cap_get_capTCBPtr(cap), tcbVTable))) {
userError("TCB SetSpace: CSpace or VSpace currently being deleted.");
current_syscall_error.type = seL4_IllegalOperation;
return EXCEPTION_SYSCALL_ERROR;
@ -1306,7 +1306,7 @@ exception_t decodeBindNotification(cap_t cap, extra_caps_t excaps)
}
if ((tcb_t *)notification_ptr_get_ntfnQueue_head(ntfnPtr)
|| (tcb_t *)notification_ptr_get_ntfnBoundTCB(ntfnPtr)) {
|| (tcb_t *)notification_ptr_get_ntfnBoundTCB(ntfnPtr)) {
userError("TCB BindNotification: Notification cannot be bound.");
current_syscall_error.type = seL4_IllegalOperation;
return EXCEPTION_SYSCALL_ERROR;
@ -1379,7 +1379,7 @@ exception_t invokeTCB_ThreadControl(tcb_t *target, cte_t *slot,
return e;
}
if (sameObjectAs(cRoot_newCap, cRoot_srcSlot->cap) &&
sameObjectAs(tCap, slot->cap)) {
sameObjectAs(tCap, slot->cap)) {
cteInsert(cRoot_newCap, cRoot_srcSlot, rootSlot);
}
}
@ -1393,7 +1393,7 @@ exception_t invokeTCB_ThreadControl(tcb_t *target, cte_t *slot,
return e;
}
if (sameObjectAs(vRoot_newCap, vRoot_srcSlot->cap) &&
sameObjectAs(tCap, slot->cap)) {
sameObjectAs(tCap, slot->cap)) {
cteInsert(vRoot_newCap, vRoot_srcSlot, rootSlot);
}
}
@ -1411,7 +1411,7 @@ exception_t invokeTCB_ThreadControl(tcb_t *target, cte_t *slot,
Arch_setTCBIPCBuffer(target, bufferAddr);
if (bufferSrcSlot && sameObjectAs(bufferCap, bufferSrcSlot->cap) &&
sameObjectAs(tCap, slot->cap)) {
sameObjectAs(tCap, slot->cap)) {
cteInsert(bufferCap, bufferSrcSlot, bufferSlot);
}
@ -1516,13 +1516,13 @@ exception_t invokeTCB_ReadRegisters(tcb_t *tcb_src, bool_t suspendSource,
j = i;
for (i = 0; i < n_gpRegisters && i + n_frameRegisters < n
&& i + n_frameRegisters < n_msgRegisters; i++) {
&& i + n_frameRegisters < n_msgRegisters; i++) {
setRegister(thread, msgRegisters[i + n_frameRegisters],
getRegister(tcb_src, gpRegisters[i]));
}
if (ipcBuffer != NULL && i < n_gpRegisters
&& i + n_frameRegisters < n) {
&& i + n_frameRegisters < n) {
for (; i < n_gpRegisters && i + n_frameRegisters < n; i++) {
ipcBuffer[i + n_frameRegisters + 1] =
getRegister(tcb_src, gpRegisters[i]);

4
src/object/untyped.c
View file

@ -212,7 +212,7 @@ exception_t decodeUntypedInvocation(word_t invLabel, word_t length, cte_t *slot,
deviceMemory = cap_untyped_cap_get_capIsDevice(cap);
if ((deviceMemory && !Arch_isFrameType(newType))
&& newType != seL4_UntypedObject) {
&& newType != seL4_UntypedObject) {
userError("Untyped Retype: Creating kernel objects with device untyped");
current_syscall_error.type = seL4_InvalidArgument;
current_syscall_error.invalidArgumentNumber = 1;
@ -256,7 +256,7 @@ static exception_t resetUntypedCap(cte_t *srcSlot)
srcSlot->cap = cap_untyped_cap_set_capFreeIndex(prev_cap, 0);
} else {
for (offset = ROUND_DOWN(offset - 1, chunk);
offset != - BIT(chunk); offset -= BIT(chunk)) {
offset != - BIT(chunk); offset -= BIT(chunk)) {
clearMemory(GET_OFFSET_FREE_PTR(regionBase, offset), chunk);
srcSlot->cap = cap_untyped_cap_set_capFreeIndex(prev_cap, OFFSET_TO_FREE_INDEX(offset));
status = preemptionPoint();

12
src/plat/imx31/machine/hardware.c
View file

@ -58,8 +58,8 @@ void plat_cleanL2Range(paddr_t start, paddr_t end)
word_t index;
for (index = L2_LINE_INDEX(start);
index < L2_LINE_INDEX(end) + 1;
index++) {
index < L2_LINE_INDEX(end) + 1;
index++) {
line = index << L2_LINE_SIZE_BITS;
imx31_l2cc_flush_regs->clean_by_pa = line;
}
@ -72,8 +72,8 @@ void plat_invalidateL2Range(paddr_t start, paddr_t end)
word_t index;
for (index = L2_LINE_INDEX(start);
index < L2_LINE_INDEX(end) + 1;
index++) {
index < L2_LINE_INDEX(end) + 1;
index++) {
line = index << L2_LINE_SIZE_BITS;
imx31_l2cc_flush_regs->inv_by_pa = line;
}
@ -87,8 +87,8 @@ void plat_cleanInvalidateL2Range(paddr_t start, paddr_t end)
word_t index;
for (index = L2_LINE_INDEX(start);
index < L2_LINE_INDEX(end) + 1;
index++) {
index < L2_LINE_INDEX(end) + 1;
index++) {
line = index << L2_LINE_SIZE_BITS;
imx31_l2cc_flush_regs->clinv_by_pa = line;
}

4
src/plat/pc99/machine/acpi.c
View file

@ -407,7 +407,7 @@ BOOT_CODE bool_t acpi_fadt_scan(
printf("ACPI: FADT flags=0x%x\n", acpi_fadt_mapped->flags);
if (config_set(CONFIG_USE_LOGICAL_IDS) &&
acpi_fadt_mapped->flags & BIT(19)) {
acpi_fadt_mapped->flags & BIT(19)) {
printf("system requires apic physical mode\n");
return false;
}
@ -484,7 +484,7 @@ BOOT_CODE void acpi_dmar_scan(
/* loop through all device scopes of this RMRR */
acpi_dmar_rmrr = (acpi_dmar_rmrr_t *)acpi_dmar_header;
if (acpi_dmar_rmrr->reg_base[1] != 0 ||
acpi_dmar_rmrr->reg_limit[1] != 0) {
acpi_dmar_rmrr->reg_limit[1] != 0) {
printf("ACPI: RMRR device above 4GiB, disabling IOMMU support\n");
*num_drhu = 0;
return ;

4
src/plat/pc99/machine/hardware.c
View file

@ -107,8 +107,8 @@ BOOT_CODE uint32_t tsc_init(void)
if (ratio != 0) {
/* Convert to MHz */
if (model_info->model == NEHALEM_1_MODEL_ID ||
model_info->model == NEHALEM_2_MODEL_ID ||
model_info->model == NEHALEM_3_MODEL_ID) {
model_info->model == NEHALEM_2_MODEL_ID ||
model_info->model == NEHALEM_3_MODEL_ID) {
return ratio * 13333u / 100u;
} else {
return ratio * 100u;