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Arm 64-bit: do not use unsigned int for arg length

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Arch_decodeInvocation takes a word_t length and then passes it to
functions that take an unsigned int length. This was OK on 32-bit where
these types are the same, but on 64-bit this is a downcast without a
range check. It isn't clear why this doesn't trip a compiler warning.

Signed-off-by: Rafal Kolanski <rafal.kolanski@proofcraft.systems>
This commit is contained in:
Rafal Kolanski 2023-12-01 19:06:43 +11:00 committed by Rafal Kolanski
parent 391bfb15f8
commit 66e5c79d06
7 changed files with 23 additions and 23 deletions
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2
include/arch/arm/arch/object/smc.h
View file

@ -8,5 +8,5 @@
#define NUM_SMC_REGS 8
exception_t decodeARMSMCInvocation(word_t label, unsigned int length, cptr_t cptr,
exception_t decodeARMSMCInvocation(word_t label, word_t length, cptr_t cptr,
cte_t *srcSlot, cap_t cap, bool_t call, word_t *buffer);

8
include/arch/arm/arch/object/smmu.h
View file

@ -14,18 +14,18 @@
#define ASID_INVALID nASIDs
exception_t decodeARMSIDControlInvocation(word_t label, unsigned int length, cptr_t cptr,
exception_t decodeARMSIDControlInvocation(word_t label, word_t length, cptr_t cptr,
cte_t *srcSlot, cap_t cap,
bool_t call, word_t *buffer);
exception_t decodeARMSIDInvocation(word_t label, unsigned int length, cptr_t cptr,
exception_t decodeARMSIDInvocation(word_t label, word_t length, cptr_t cptr,
cte_t *srcSlot, cap_t cap, bool_t call, word_t *buffer);
exception_t decodeARMCBControlInvocation(word_t label, unsigned int length, cptr_t cptr,
exception_t decodeARMCBControlInvocation(word_t label, word_t length, cptr_t cptr,
cte_t *srcSlot, cap_t cap,
bool_t call, word_t *buffer);
exception_t decodeARMCBInvocation(word_t label, unsigned int length, cptr_t cptr,
exception_t decodeARMCBInvocation(word_t label, word_t length, cptr_t cptr,
cte_t *srcSlot, cap_t cap, bool_t call, word_t *buffer);
exception_t smmu_delete_cb(cap_t cap);
exception_t smmu_delete_sid(cap_t cap);

10
include/arch/arm/arch/object/vcpu.h
View file

@ -107,7 +107,7 @@ void dissociateVCPUTCB(vcpu_t *vcpu, tcb_t *tcb);
exception_t decodeARMVCPUInvocation(
word_t label,
unsigned int length,
word_t length,
cptr_t cptr,
cte_t *slot,
cap_t cap,
@ -121,11 +121,11 @@ void vcpu_switch(vcpu_t *cpu);
void handleVCPUInjectInterruptIPI(vcpu_t *vcpu, unsigned long index, virq_t virq);
#endif /* ENABLE_SMP_SUPPORT */
exception_t decodeVCPUWriteReg(cap_t cap, unsigned int length, word_t *buffer);
exception_t decodeVCPUReadReg(cap_t cap, unsigned int length, bool_t call, word_t *buffer);
exception_t decodeVCPUInjectIRQ(cap_t cap, unsigned int length, word_t *buffer);
exception_t decodeVCPUWriteReg(cap_t cap, word_t length, word_t *buffer);
exception_t decodeVCPUReadReg(cap_t cap, word_t length, bool_t call, word_t *buffer);
exception_t decodeVCPUInjectIRQ(cap_t cap, word_t length, word_t *buffer);
exception_t decodeVCPUSetTCB(cap_t cap);
exception_t decodeVCPUAckVPPI(cap_t cap, unsigned int length, word_t *buffer);
exception_t decodeVCPUAckVPPI(cap_t cap, word_t length, word_t *buffer);
exception_t invokeVCPUWriteReg(vcpu_t *vcpu, word_t field, word_t value);
exception_t invokeVCPUReadReg(vcpu_t *vcpu, word_t field, bool_t call);

6
src/arch/arm/64/kernel/vspace.c
View file

@ -1247,7 +1247,7 @@ static exception_t performASIDControlInvocation(void *frame, cte_t *slot,
return EXCEPTION_NONE;
}
static exception_t decodeARMVSpaceRootInvocation(word_t invLabel, unsigned int length,
static exception_t decodeARMVSpaceRootInvocation(word_t invLabel, word_t length,
cte_t *cte, cap_t cap, word_t *buffer)
{
vptr_t start, end;
@ -1350,7 +1350,7 @@ static exception_t decodeARMVSpaceRootInvocation(word_t invLabel, unsigned int l
}
static exception_t decodeARMPageTableInvocation(word_t invLabel, unsigned int length,
static exception_t decodeARMPageTableInvocation(word_t invLabel, word_t length,
cte_t *cte, cap_t cap, word_t *buffer)
{
cap_t vspaceRootCap;
@ -1440,7 +1440,7 @@ static inline bool_t CONST checkVPAlignment(vm_page_size_t sz, word_t w)
return (w & MASK(pageBitsForSize(sz))) == 0;
}
static exception_t decodeARMFrameInvocation(word_t invLabel, unsigned int length,
static exception_t decodeARMFrameInvocation(word_t invLabel, word_t length,
cte_t *cte, cap_t cap, bool_t call, word_t *buffer)
{
switch (invLabel) {

2
src/arch/arm/object/smc.c
View file

@ -63,7 +63,7 @@ static exception_t invokeSMCCall(word_t *buffer, bool_t call)
return EXCEPTION_NONE;
}
exception_t decodeARMSMCInvocation(word_t label, unsigned int length, cptr_t cptr,
exception_t decodeARMSMCInvocation(word_t label, word_t length, cptr_t cptr,
cte_t *srcSlot, cap_t cap, bool_t call, word_t *buffer)
{
if (label != ARMSMCCall) {

8
src/arch/arm/object/smmu.c
View file

@ -18,7 +18,7 @@ static exception_t checkARMCBVspace(cap_t cap)
return EXCEPTION_NONE;
}
exception_t decodeARMSIDControlInvocation(word_t label, unsigned int length, cptr_t cptr,
exception_t decodeARMSIDControlInvocation(word_t label, word_t length, cptr_t cptr,
cte_t *srcSlot, cap_t cap, bool_t call, word_t *buffer)
{
@ -99,7 +99,7 @@ exception_t decodeARMSIDControlInvocation(word_t label, unsigned int length, cpt
return EXCEPTION_NONE;
}
exception_t decodeARMSIDInvocation(word_t label, unsigned int length, cptr_t cptr,
exception_t decodeARMSIDInvocation(word_t label, word_t length, cptr_t cptr,
cte_t *srcSlot, cap_t cap, bool_t call, word_t *buffer)
{
cap_t cbCap;
@ -185,7 +185,7 @@ exception_t smmu_delete_sid(cap_t cap)
return status;
}
exception_t decodeARMCBControlInvocation(word_t label, unsigned int length, cptr_t cptr,
exception_t decodeARMCBControlInvocation(word_t label, word_t length, cptr_t cptr,
cte_t *srcSlot, cap_t cap, bool_t call, word_t *buffer)
{
@ -249,7 +249,7 @@ exception_t decodeARMCBControlInvocation(word_t label, unsigned int length, cptr
return EXCEPTION_NONE;
}
exception_t decodeARMCBInvocation(word_t label, unsigned int length, cptr_t cptr,
exception_t decodeARMCBInvocation(word_t label, word_t length, cptr_t cptr,
cte_t *srcSlot, cap_t cap, bool_t call, word_t *buffer)
{

10
src/arch/arm/object/vcpu.c
View file

@ -314,7 +314,7 @@ exception_t invokeVCPUWriteReg(vcpu_t *vcpu, word_t field, word_t value)
return EXCEPTION_NONE;
}
exception_t decodeVCPUWriteReg(cap_t cap, unsigned int length, word_t *buffer)
exception_t decodeVCPUWriteReg(cap_t cap, word_t length, word_t *buffer)
{
word_t field;
word_t value;
@ -351,7 +351,7 @@ exception_t invokeVCPUReadReg(vcpu_t *vcpu, word_t field, bool_t call)
return EXCEPTION_NONE;
}
exception_t decodeVCPUReadReg(cap_t cap, unsigned int length, bool_t call, word_t *buffer)
exception_t decodeVCPUReadReg(cap_t cap, word_t length, bool_t call, word_t *buffer)
{
word_t field;
if (length < 1) {
@ -388,7 +388,7 @@ exception_t invokeVCPUInjectIRQ(vcpu_t *vcpu, unsigned long index, virq_t virq)
return EXCEPTION_NONE;
}
exception_t decodeVCPUInjectIRQ(cap_t cap, unsigned int length, word_t *buffer)
exception_t decodeVCPUInjectIRQ(cap_t cap, word_t length, word_t *buffer)
{
word_t vid, priority, group, index;
vcpu_t *vcpu;
@ -473,7 +473,7 @@ exception_t decodeVCPUInjectIRQ(cap_t cap, unsigned int length, word_t *buffer)
exception_t decodeARMVCPUInvocation(
word_t label,
unsigned int length,
word_t length,
cptr_t cptr,
cte_t *slot,
cap_t cap,
@ -499,7 +499,7 @@ exception_t decodeARMVCPUInvocation(
}
}
exception_t decodeVCPUAckVPPI(cap_t cap, unsigned int length, word_t *buffer)
exception_t decodeVCPUAckVPPI(cap_t cap, word_t length, word_t *buffer)
{
vcpu_t *vcpu = VCPU_PTR(cap_vcpu_cap_get_capVCPUPtr(cap));