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aarch64: remove redundent CPSR.AIF in HCR_NATIVE

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CPSR.AIF already presented in HCR_COMMON macro,
And HCR_NATIVE includes HCR_COMMON, then no need
To set CPSR.AIF bit again

Signed-off-by: Cao Jianlong <caojianlong@outlook.com>
This commit is contained in:
Cao Jianlong 2022-03-30 23:10:27 +08:00 committed by Gerwin Klein
parent 1612a7f61d
commit 8278066238
1 changed files with 1 additions and 1 deletions
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include/arch/arm/armv/armv8-a/64/armv/vcpu.h
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@ -24,7 +24,7 @@
/* Allow native tasks to run at EL0, but restrict access */
#define HCR_NATIVE ( HCR_COMMON | HCR_TGE | HCR_TVM | HCR_TTLB | HCR_DC \
| HCR_TAC | HCR_SWIO | HCR_TSC | HCR_IMO | HCR_FMO | HCR_AMO)
| HCR_TAC | HCR_SWIO | HCR_TSC )
#define HCR_VCPU ( HCR_COMMON | HCR_TSC)
#define SCTLR_EL1_UCI BIT(26) /* Enable EL0 access to DC CVAU, DC CIVAC, DC CVAC,