boot: make clock sync test delta conditional

The clock sync test at boot keeps failing for the hifive board with time
deltas as high as 5. We think this is because mmode might be taking a
big lock for reading the time.

Add a macro for allowed delta and set it to a higher value for RISC-V.

Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
This commit is contained in:
Gerwin Klein 2025-02-26 11:15:27 +11:00
parent 0afcd6651c
commit 9334b7d85d
2 changed files with 11 additions and 1 deletions

View file

@ -145,6 +145,16 @@ word_t arch_get_n_paging(v_region_t it_veg);
#ifdef ENABLE_SMP_CLOCK_SYNC_TEST_ON_BOOT
BOOT_CODE void clock_sync_test(void);
/* Delta (in us) allowed in the clock sync test in addition to getTimerPrecision().
On RISC-V, reading the clock goes via mmode. If mmode uses a big lock, that
can take considerable time */
#ifdef CONFIG_ARCH_RISCV
#define CLOCK_SYNC_DELTA 5
#else
#define CLOCK_SYNC_DELTA 1
#endif
#else
#define clock_sync_test()
#endif

View file

@ -572,7 +572,7 @@ BOOT_CODE tcb_t *create_initial_thread(cap_t root_cnode_cap, cap_t it_pd_cap, vp
BOOT_CODE void clock_sync_test(void)
{
ticks_t t, t0;
ticks_t margin = usToTicks(1) + getTimerPrecision();
ticks_t margin = usToTicks(CLOCK_SYNC_DELTA) + getTimerPrecision();
assert(getCurrentCPUIndex() != 0);
t = NODE_STATE_ON_CORE(ksCurTime, 0);