boot: make clock sync test delta conditional
The clock sync test at boot keeps failing for the hifive board with time deltas as high as 5. We think this is because mmode might be taking a big lock for reading the time. Add a macro for allowed delta and set it to a higher value for RISC-V. Signed-off-by: Gerwin Klein <gerwin.klein@proofcraft.systems>
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2 changed files with 11 additions and 1 deletions
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@ -145,6 +145,16 @@ word_t arch_get_n_paging(v_region_t it_veg);
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#ifdef ENABLE_SMP_CLOCK_SYNC_TEST_ON_BOOT
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BOOT_CODE void clock_sync_test(void);
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/* Delta (in us) allowed in the clock sync test in addition to getTimerPrecision().
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On RISC-V, reading the clock goes via mmode. If mmode uses a big lock, that
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can take considerable time */
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#ifdef CONFIG_ARCH_RISCV
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#define CLOCK_SYNC_DELTA 5
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#else
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#define CLOCK_SYNC_DELTA 1
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#endif
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#else
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#define clock_sync_test()
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#endif
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@ -572,7 +572,7 @@ BOOT_CODE tcb_t *create_initial_thread(cap_t root_cnode_cap, cap_t it_pd_cap, vp
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BOOT_CODE void clock_sync_test(void)
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{
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ticks_t t, t0;
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ticks_t margin = usToTicks(1) + getTimerPrecision();
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ticks_t margin = usToTicks(CLOCK_SYNC_DELTA) + getTimerPrecision();
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assert(getCurrentCPUIndex() != 0);
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t = NODE_STATE_ON_CORE(ksCurTime, 0);
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