From a5f61c7166c0f44cdc062b8599009a90f29e124d Mon Sep 17 00:00:00 2001 From: akroh Date: Mon, 23 Mar 2015 10:34:08 +1100 Subject: [PATCH] ARM: Fix hardcoded CPSR value for the idle thread --- include/arch/arm/arch/machine/registerset.h | 4 ++++ src/arch/arm/kernel/thread.c | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/include/arch/arm/arch/machine/registerset.h b/include/arch/arm/arch/machine/registerset.h index 21bc11418..3c5103b2d 100644 --- a/include/arch/arm/arch/machine/registerset.h +++ b/include/arch/arm/arch/machine/registerset.h @@ -33,6 +33,10 @@ | PMODE_SUPERVISOR \ | CPSR_EXTRA_FLAGS ) +#define CPSR_IDLETHREAD ( PMASK_FIRQ \ + | PMODE_SUPERVISOR \ + | CPSR_EXTRA_FLAGS ) + #ifdef __ASSEMBLER__ /* Offsets within the user context, these need to match the order in diff --git a/src/arch/arm/kernel/thread.c b/src/arch/arm/kernel/thread.c index ee88fce2e..a9af57799 100644 --- a/src/arch/arm/kernel/thread.c +++ b/src/arch/arm/kernel/thread.c @@ -26,7 +26,7 @@ Arch_switchToThread(tcb_t *tcb) BOOT_CODE void Arch_configureIdleThread(tcb_t *tcb) { - setRegister(tcb, CPSR, 0x1f); + setRegister(tcb, CPSR, CPSR_IDLETHREAD); setRegister(tcb, LR_svc, (word_t)idleThreadStart); }