armv8/tx1: Expose more devices to user mode
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1 changed files with 16 additions and 2 deletions
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@ -87,8 +87,22 @@ static const p_region_t BOOT_RODATA avail_p_regs[] = {
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};
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static const p_region_t BOOT_RODATA dev_p_regs[] = {
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{ UARTA_SYNC_PADDR, UARTA_SYNC_PADDR + (BIT(seL4_PageBits) * 3 ) }, /* 12 KB, multiple */
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{ TMR_PADDR, TMR_PADDR + BIT(seL4_PageBits) } /* 4 KB */
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{ GICV_PADDR, GICV_PADDR + BIT(seL4_PageBits) },
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{ CLK_RESET_PADDR, CLK_RESET_PADDR + BIT(seL4_PageBits) },
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{ ICTLR_PADDR, ICTLR_PADDR + BIT(seL4_PageBits) },
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{ SYS_REG_PADDR, SYS_REG_PADDR + BIT(seL4_PageBits) },
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{ GPIO_PADDR, GPIO_PADDR + BIT(seL4_PageBits) },
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{ APB_DMA_PADDR, APB_DMA_PADDR + BIT(seL4_PageBits) * 4 },
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{ I2C1_4_PADDR, I2C1_4_PADDR + BIT(seL4_PageBits) },
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{ I2C5_6_SPI2B1_4_PADDR, I2C5_6_SPI2B1_4_PADDR + BIT(seL4_PageBits) },
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{ RTC_PMC_PADDR, RTC_PMC_PADDR + BIT(seL4_PageBits) },
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{ MISC_PADDR, MISC_PADDR + BIT(seL4_PageBits) * 3 },
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{ FUSE_KFUSE_PADDR, FUSE_KFUSE_PADDR + BIT(seL4_PageBits) },
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{ MC_PADDR, MC_PADDR + BIT(seL4_PageBits) },
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{ PINMUX_AUX_PADDR, PINMUX_AUX_PADDR + BIT(seL4_PageBits) },
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{ CSITE_PADDR, CSITE_PADDR + BIT(seL4_PageBits) * 8192 }, /* 32 MB */
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{ UARTA_SYNC_PADDR, UARTA_SYNC_PADDR + (BIT(seL4_PageBits) * 3 ) }, /* 12 KB, multiple */
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{ TMR_PADDR, TMR_PADDR + BIT(seL4_PageBits) } /* 4 KB */
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};
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/* Handle a platform-reserved IRQ. */
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