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rocketchip-zcu102: use plic0

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On the ZCU102 Rocketchip instantiation, the PLIC is available required
to use hardware peripherals like a UART

Signed-off-by: Chris Guikema <chris.guikema@dornerworks.com>
This commit is contained in:
Chris Guikema 2023-02-02 09:38:46 -05:00 committed by Kent McLeod
parent bebac7ffe2
commit b99e1ba325
3 changed files with 21 additions and 10 deletions
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3
include/drivers/irq/riscv_plic0.h
View file

@ -14,7 +14,8 @@
* this driver is confirmed to be working on other platforms. */
#if !defined(CONFIG_PLAT_HIFIVE) && \
!defined(CONFIG_PLAT_POLARFIRE) && \
!defined(CONFIG_PLAT_QEMU_RISCV_VIRT)
!defined(CONFIG_PLAT_QEMU_RISCV_VIRT) && \
!defined(CONFIG_PLAT_ROCKETCHIP_ZCU102)
#error "Check if this platform suppots a PLIC."
#endif

23
src/plat/rocketchip/config.cmake
View file

@ -44,18 +44,23 @@ if(KernelPlatformRocketchip)
# repo is added as a remote to the tools/opensbi project in the seL4 codebase
config_set(KernelOpenSBIPlatform OPENSBI_PLATFORM "rocket-fpga-zcu104")
list(APPEND KernelDTSList "src/plat/rocketchip/overlay-rocketchip-zcu102.dts")
# The zcu102 instantiation supports the PLIC and external interrupts
declare_default_headers(
TIMER_FREQUENCY 10000000 PLIC_MAX_NUM_INT 128
INTERRUPT_CONTROLLER drivers/irq/riscv_plic0.h
)
else()
config_set(KernelOpenSBIPlatform OPENSBI_PLATFORM "generic")
# This is an experimental platform that supports accessing peripherals, but
# the status of support for external interrupts via a PLIC is unclear and
# may differ depending on the version that is synthesized. Declaring no
# interrupts and using the dummy PLIC driver seems the best option for now
# to avoid confusion or even crashes.
declare_default_headers(
TIMER_FREQUENCY 10000000 PLIC_MAX_NUM_INT 0
INTERRUPT_CONTROLLER drivers/irq/riscv_plic_dummy.h
)
endif()
# This is an experimental platform that supports accessing peripherals, but
# the status of support for external interrupts via a PLIC is unclear and
# may differ depending on the version that is synthesized. Declaring no
# interrupts and using the dummy PLIC driver seems the best option for now
# to avoid confusion or even crashes.
declare_default_headers(
TIMER_FREQUENCY 10000000 PLIC_MAX_NUM_INT 0
INTERRUPT_CONTROLLER drivers/irq/riscv_plic_dummy.h
)
else()
unset(KernelPlatformFirstHartID CACHE)
endif()

5
src/plat/rocketchip/overlay-rocketchip-zcu102.dts
View file

@ -5,6 +5,11 @@
*/
/ {
chosen {
seL4,kernel-devices =
&{/soc/interrupt-controller@c000000};
};
/delete-node/ memory@80000000;
L6: memory@40000000 {