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riscv: Change default FPU extensions to ON

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This changes the default configuration values of the build options:
KernelRiscvExtF and KernelRiscvExtD from OFF to ON.

The options control whether the kernel will support user applications
that use either of the floating point extensions. When these options are
off, FPU instructions will cause an exception.

Arm and x86 default FPU architecture support to ON and so this change is
making the default option consistent across architectures.

Signed-off-by: Kent McLeod <kent@kry10.com>
This commit is contained in:
Kent McLeod 2025-02-10 09:24:05 +11:00 committed by Kent McLeod
parent ddad13cafd
commit bf3fbef460
3 changed files with 11 additions and 2 deletions
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2
CHANGES.md
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@ -26,6 +26,8 @@ description indicates whether it is SOURCE-COMPATIBLE, BINARY-COMPATIBLE, or BRE
### Changes
* Added `zynqmp` and `rpi4` to the set of verified AArch64 configs.
* riscv: Change default cmake options KernelRiscvExtF and KernelRiscvExtD from OFF to ON.
Except for RISCV32 with LLVM clang enabled will default KernelRiscvExtD to OFF.
### Platforms

2
configs/include/RISCV64_verified_include.cmake
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@ -25,3 +25,5 @@ set(KernelRootCNodeSizeBits 19 CACHE STRING "")
set(KernelMaxNumBootinfoUntypedCaps 50 CACHE STRING "")
set(KernelClzNoBuiltin ON CACHE BOOL "")
set(KernelCtzNoBuiltin ON CACHE BOOL "")
set(KernelRiscvExtF OFF CACHE BOOL "")
set(KernelRiscvExtD OFF CACHE BOOL "")

9
src/arch/riscv/config.cmake
View file

@ -17,13 +17,18 @@ config_string(
config_option(
KernelRiscvExtF RISCV_EXT_F "RISC-V extension for single-precision floating-point"
DEFAULT OFF
DEFAULT ON
DEPENDS "KernelArchRiscV"
)
set(_KernelRiscvExtD ON)
if(LLVM_TOOLCHAIN AND KernelSel4ArchRiscV32)
set(_KernelRiscvExtD OFF)
endif()
config_option(
KernelRiscvExtD RISCV_EXT_D "RISC-V extension for double-precision floating-point"
DEFAULT OFF
DEFAULT ${_KernelRiscvExtD}
DEPENDS "KernelArchRiscV"
)