From c7d5bb0ed4ac7d8efa0a9b94426afe96d917b77e Mon Sep 17 00:00:00 2001 From: Kent McLeod Date: Fri, 9 Jul 2021 12:05:22 +1000 Subject: [PATCH] libsel4: Fix name for AARCH64_VSPACE_S2_START_L1 CONFIG_AARCH64_VSPACE_S2_START_L1 has the correct namespace for a kernel config option. Signed-off-by: Kent McLeod --- CHANGES | 2 ++ include/config.h | 6 ++++++ libsel4/include/sel4/config.h | 6 ------ src/arch/arm/config.cmake | 6 ++++++ 4 files changed, 14 insertions(+), 6 deletions(-) diff --git a/CHANGES b/CHANGES index 452b0df1d..c5c3c0ceb 100644 --- a/CHANGES +++ b/CHANGES @@ -29,6 +29,8 @@ Upcoming release: BINARY COMPATIBLE * Added support for the ARM Cortex A55 * Added support for the ODroid C4 * Rename libsel4 config option ENABLE_SMP_SUPPORT to CONFIG_ENABLE_SMP_SUPPORT to be namespace compliant. + * Rename libsel4 config option AARCH64_VSPACE_S2_START_L1 to CONFIG_AARCH64_VSPACE_S2_START_L1 to be namespace + compliant. ## Upgrade Notes --- diff --git a/include/config.h b/include/config.h index a1bdb73a9..d3418b8ad 100644 --- a/include/config.h +++ b/include/config.h @@ -12,3 +12,9 @@ #ifdef CONFIG_ENABLE_SMP_SUPPORT #define ENABLE_SMP_SUPPORT #endif + +#ifdef CONFIG_ARM_HYPERVISOR_SUPPORT +#ifdef CONFIG_ARM_PA_SIZE_BITS_40 +#define AARCH64_VSPACE_S2_START_L1 +#endif +#endif diff --git a/libsel4/include/sel4/config.h b/libsel4/include/sel4/config.h index 59c86a9cd..8a705ae11 100644 --- a/libsel4/include/sel4/config.h +++ b/libsel4/include/sel4/config.h @@ -10,12 +10,6 @@ #include -#ifdef CONFIG_ARM_HYPERVISOR_SUPPORT -#ifdef CONFIG_ARM_PA_SIZE_BITS_40 -#define AARCH64_VSPACE_S2_START_L1 -#endif -#endif - /* Configurations requring the kernel log buffer */ #if defined CONFIG_BENCHMARK_TRACK_KERNEL_ENTRIES || \ defined CONFIG_BENCHMARK_TRACEPOINTS diff --git a/src/arch/arm/config.cmake b/src/arch/arm/config.cmake index 90b896712..e1137b6ba 100644 --- a/src/arch/arm/config.cmake +++ b/src/arch/arm/config.cmake @@ -102,6 +102,12 @@ config_option( config_option(KernelArmGicV3 ARM_GIC_V3_SUPPORT "Build support for GICv3" DEFAULT OFF) +if(KernelArmPASizeBits40 AND ARM_HYPERVISOR_SUPPORT) + config_set(KernelAarch64VspaceS2StartL1 AARCH64_VSPACE_S2_START_L1 "ON") +else() + config_set(KernelAarch64VspaceS2StartL1 AARCH64_VSPACE_S2_START_L1 "OFF") +endif() + config_option( KernelArmHypEnableVCPUCP14SaveAndRestore ARM_HYP_ENABLE_VCPU_CP14_SAVE_AND_RESTORE "Trap, but don't save/restore VCPUs' CP14 accesses \