consolidate arm core specific constants

Signed-off-by: Axel Heider <axelheider@gmx.de>
This commit is contained in:
Axel Heider 2021-10-26 00:51:57 +02:00 committed by Gerwin Klein
parent d3e9880ef6
commit edbc81eba4
35 changed files with 319 additions and 192 deletions

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@ -0,0 +1,28 @@
/*
* Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)
*
* SPDX-License-Identifier: BSD-2-Clause
*/
#pragma once
#include <autoconf.h>
#if !defined(CONFIG_ARM_CORTEX_A15)
#error CONFIG_ARM_CORTEX_A15 is not defined
#endif
/* Cortex-A15 Manual, Section 10.2.2 */
#define seL4_NumHWBreakpoints 10
#define seL4_NumExclusiveBreakpoints 6
#define seL4_NumExclusiveWatchpoints 4
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstBreakpoint 0
#define seL4_FirstWatchpoint 6
#define seL4_NumDualFunctionMonitors 0
#define seL4_FirstDualFunctionMonitor (-1)
#endif /* CONFIG_HARDWARE_DEBUG_API */

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@ -0,0 +1,28 @@
/*
* Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)
*
* SPDX-License-Identifier: BSD-2-Clause
*/
#pragma once
#include <autoconf.h>
#if !defined(CONFIG_ARM_CORTEX_A35)
#error CONFIG_ARM_CORTEX_A35 is not defined
#endif
/* Cortex-A35 Manual, Table C7.1 */
#define seL4_NumHWBreakpoints 6
#define seL4_NumExclusiveBreakpoints 6
#define seL4_NumExclusiveWatchpoints 4
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstBreakpoint 0
#define seL4_FirstWatchpoint 6
#define seL4_NumDualFunctionMonitors 0
#define seL4_FirstDualFunctionMonitor (-1)
#endif /* CONFIG_HARDWARE_DEBUG_API */

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@ -0,0 +1,28 @@
/*
* Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)
*
* SPDX-License-Identifier: BSD-2-Clause
*/
#pragma once
#include <autoconf.h>
#if !defined(CONFIG_ARM_CORTEX_A53)
#error CONFIG_ARM_CORTEX_A53 is not defined
#endif
/* Cortex-A53 Manual, Section 11.6.1 */
#define seL4_NumHWBreakpoints 10
#define seL4_NumExclusiveBreakpoints 6
#define seL4_NumExclusiveWatchpoints 4
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstBreakpoint 0
#define seL4_FirstWatchpoint 6
#define seL4_NumDualFunctionMonitors 0
#define seL4_FirstDualFunctionMonitor (-1)
#endif /* CONFIG_HARDWARE_DEBUG_API */

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/*
* Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)
*
* SPDX-License-Identifier: BSD-2-Clause
*/
#pragma once
#include <autoconf.h>
#if !defined(CONFIG_ARM_CORTEX_A55)
#error CONFIG_ARM_CORTEX_A55 is not defined
#endif
/* Cortex-A55 Manual */
#define seL4_NumHWBreakpoints 10
#define seL4_NumExclusiveBreakpoints 6
#define seL4_NumExclusiveWatchpoints 4
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstBreakpoint 0
#define seL4_FirstWatchpoint 6
#define seL4_NumDualFunctionMonitors 0
#define seL4_FirstDualFunctionMonitor (-1)
#endif /* CONFIG_HARDWARE_DEBUG_API */

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@ -0,0 +1,28 @@
/*
* Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)
*
* SPDX-License-Identifier: BSD-2-Clause
*/
#pragma once
#include <autoconf.h>
#if !defined(CONFIG_ARM_CORTEX_A57)
#error CONFIG_ARM_CORTEX_A57 is not defined
#endif
/* Cortex-A57 Manual, Section 10.6.1 */
#define seL4_NumHWBreakpoints 10
#define seL4_NumExclusiveBreakpoints 6
#define seL4_NumExclusiveWatchpoints 4
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstBreakpoint 0
#define seL4_FirstWatchpoint 6
#define seL4_NumDualFunctionMonitors 0
#define seL4_FirstDualFunctionMonitor (-1)
#endif /* CONFIG_HARDWARE_DEBUG_API */

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/*
* Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)
*
* SPDX-License-Identifier: BSD-2-Clause
*/
#pragma once
#include <autoconf.h>
#if !defined(CONFIG_ARM_CORTEX_A7)
#error CONFIG_ARM_CORTEX_A7 is not defined
#endif
/* Cortex-A7 Manual, Table 10-2 */
#define seL4_NumHWBreakpoints 10
#define seL4_NumExclusiveBreakpoints 6
#define seL4_NumExclusiveWatchpoints 4
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstBreakpoint 0
#define seL4_FirstWatchpoint 6
#define seL4_NumDualFunctionMonitors 0
#define seL4_FirstDualFunctionMonitor (-1)
#endif /* CONFIG_HARDWARE_DEBUG_API */

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/*
* Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)
*
* SPDX-License-Identifier: BSD-2-Clause
*/
#pragma once
#include <autoconf.h>
#if !defined(CONFIG_ARM_CORTEX_A72)
#error CONFIG_ARM_CORTEX_A72 is not defined
#endif
/* Cortex-A72 Manual, Section 10.3 */
#define seL4_NumHWBreakpoints 10
#define seL4_NumExclusiveBreakpoints 6
#define seL4_NumExclusiveWatchpoints 4
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstBreakpoint 0
#define seL4_FirstWatchpoint 6
#define seL4_NumDualFunctionMonitors 0
#define seL4_FirstDualFunctionMonitor (-1)
#endif /* CONFIG_HARDWARE_DEBUG_API */

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/*
* Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)
*
* SPDX-License-Identifier: BSD-2-Clause
*/
#pragma once
#include <autoconf.h>
#if !defined(CONFIG_ARM_CORTEX_A8)
#error CONFIG_ARM_CORTEX_A8 is not defined
#endif
/* Cortex-A8 Manual, Table 12-11 */
#define seL4_NumHWBreakpoints 8
#define seL4_NumExclusiveBreakpoints 6
#define seL4_NumExclusiveWatchpoints 2
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstBreakpoint 0
#define seL4_FirstWatchpoint 6
#define seL4_NumDualFunctionMonitors 0
#define seL4_FirstDualFunctionMonitor (-1)
#endif /* CONFIG_HARDWARE_DEBUG_API */

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/*
* Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)
*
* SPDX-License-Identifier: BSD-2-Clause
*/
#pragma once
#include <autoconf.h>
#if !defined(CONFIG_ARM_CORTEX_A9)
#error CONFIG_ARM_CORTEX_A9 is not defined
#endif
/* Cortex-A9 Manual, Section 10.1.2 */
#define seL4_NumHWBreakpoints 10
#define seL4_NumExclusiveBreakpoints 6
#define seL4_NumExclusiveWatchpoints 4
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstBreakpoint 0
#define seL4_FirstWatchpoint 6
#define seL4_NumDualFunctionMonitors 0
#define seL4_FirstDualFunctionMonitor (-1)
#endif /* CONFIG_HARDWARE_DEBUG_API */

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@ -242,12 +242,6 @@ SEL4_SIZE_SANITY(seL4_PGDEntryBits, seL4_PGDIndexBits, seL4_PGDBits);
#define seL4_LogBufferSize (LIBSEL4_BIT(20))
#endif /* CONFIG_ENABLE_BENCHMARKS */
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstBreakpoint (0)
#define seL4_FirstDualFunctionMonitor (-1)
#define seL4_NumDualFunctionMonitors (0)
#endif
#define seL4_FastMessageRegisters 4
/* IPC buffer is 512 bytes, giving size bits of 9 */

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@ -247,12 +247,6 @@ SEL4_SIZE_SANITY(seL4_PUDEntryBits, seL4_PUDIndexBits, seL4_PUDBits);
#define seL4_LogBufferSize (LIBSEL4_BIT(20))
#endif /* CONFIG_ENABLE_BENCHMARKS */
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstBreakpoint (0)
#define seL4_FirstDualFunctionMonitor (-1)
#define seL4_NumDualFunctionMonitors (0)
#endif
#define seL4_FastMessageRegisters 4
/* IPC buffer is 1024 bytes, giving size bits of 10 */

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@ -7,15 +7,7 @@
#pragma once
#include <autoconf.h>
/* Cortex A7 manual, table 10-2 */
#define seL4_NumHWBreakpoints (10)
#define seL4_NumExclusiveBreakpoints (6)
#define seL4_NumExclusiveWatchpoints (4)
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstWatchpoint (6)
#define seL4_NumDualFunctionMonitors (0)
#endif
#include <sel4/arch/constants_cortex_a7.h>
/* First address in the virtual address space that is not accessible to user level */
#define seL4_UserTop 0xa0000000

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@ -7,15 +7,7 @@
#pragma once
#include <autoconf.h>
/* Cortex a8 manual, table 12-11 */
#define seL4_NumHWBreakpoints (8)
#define seL4_NumExclusiveBreakpoints (6)
#define seL4_NumExclusiveWatchpoints (2)
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstWatchpoint (6)
#define seL4_NumDualFunctionMonitors (0)
#endif
#include <sel4/arch/constants_cortex_a8.h>
/* First address in the virtual address space that is not accessible to user level */
#define seL4_UserTop 0xe0000000

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@ -7,15 +7,7 @@
#pragma once
#include <autoconf.h>
/* Cortex a15 manual, section 10.2.2 */
#define seL4_NumHWBreakpoints (10)
#define seL4_NumExclusiveBreakpoints (6)
#define seL4_NumExclusiveWatchpoints (4)
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstWatchpoint (6)
#define seL4_NumDualFunctionMonitors (0)
#endif
#include <sel4/arch/constants_cortex_a15.h>
/* First address in the virtual address space that is not accessible to user level */
#define seL4_UserTop 0xe0000000

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@ -7,15 +7,8 @@
#pragma once
#include <autoconf.h>
/* Cortex A72 manual, section 10.3 */
#define seL4_NumHWBreakpoints (10)
#define seL4_NumExclusiveBreakpoints (6)
#define seL4_NumExclusiveWatchpoints (4)
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstWatchpoint (6)
#define seL4_NumDualFunctionMonitors (0)
#endif
/* RasPi4 uses a BCM2711 SoC with 4x Cortex-A72. */
#include <sel4/arch/constants_cortex_a72.h>
#if CONFIG_WORD_SIZE == 32
/* First address in the virtual address space that is not accessible to user level */

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@ -7,15 +7,8 @@
#pragma once
#include <autoconf.h>
/* Cortex A57 manual, section 10.6.1 */
#define seL4_NumHWBreakpoints (10)
#define seL4_NumExclusiveBreakpoints (6)
#define seL4_NumExclusiveWatchpoints (4)
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstWatchpoint (6)
#define seL4_NumDualFunctionMonitors (0)
#endif
/* RasPi3 uses a BCM2837 SoC with 4x Cortex-A53. */
#include <sel4/arch/constants_cortex_a53.h>
#if CONFIG_WORD_SIZE == 32
/* First address in the virtual address space that is not accessible to user level */

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@ -7,15 +7,7 @@
#pragma once
#include <autoconf.h>
/* Cortex a9 manual, section 10.1.2 */
#define seL4_NumHWBreakpoints (10)
#define seL4_NumExclusiveBreakpoints (6)
#define seL4_NumExclusiveWatchpoints (4)
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstWatchpoint (6)
#define seL4_NumDualFunctionMonitors (0)
#endif
#include <sel4/arch/constants_cortex_a9.h>
/* First address in the virtual address space that is not accessible to user level */
#define seL4_UserTop 0xe0000000

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@ -7,13 +7,19 @@
#include <autoconf.h>
/* Cortex a15 manual, section 10.2.2 */
#define seL4_NumHWBreakpoints (10)
#define seL4_NumExclusiveBreakpoints (6)
#define seL4_NumExclusiveWatchpoints (4)
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstWatchpoint (6)
#define seL4_NumDualFunctionMonitors (0)
/* This is used for multiple SOCs:
* - Exynos5250 (A15)
* - Exynos5410 (A7/A15)
* - Exynos5422 (A7/A15)
* Since the A7 was designed as big.LITTLE companion for the A15, their settings
* are identical.
*/
#if defined(CONFIG_ARM_CORTEX_A7)
#include <sel4/arch/constants_cortex_a7.h>
#elif defined(CONFIG_ARM_CORTEX_A15)
#include <sel4/arch/constants_cortex_a15.h>
#else
#error "unsupported core"
#endif
/* First address in the virtual address space that is not accessible to user level */

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@ -8,11 +8,9 @@
#include <autoconf.h>
/* Cortex A57 manual, section 10.6.1 */
#define seL4_NumHWBreakpoints (10)
#define seL4_NumExclusiveBreakpoints (6)
#define seL4_NumExclusiveWatchpoints (4)
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstWatchpoint (6)
#define seL4_NumDualFunctionMonitors (0)
/* The FVP can emulate various cores */
#if defined(CONFIG_ARM_CORTEX_A57)
#include <sel4/arch/constants_cortex_a57.h>
#else
#error "unsupported core"
#endif

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@ -7,15 +7,8 @@
#pragma once
#include <autoconf.h>
/* Cortex A57 manual, section 10.6.1 */
#define seL4_NumHWBreakpoints (10)
#define seL4_NumExclusiveBreakpoints (6)
#define seL4_NumExclusiveWatchpoints (4)
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstWatchpoint (6)
#define seL4_NumDualFunctionMonitors (0)
#endif
/* HiKey uses a HiSilicon Kirin620 SoC with 2 clusters of 4 Cortex-A53 each. */
#include <sel4/arch/constants_cortex_a53.h>
#if CONFIG_WORD_SIZE == 32
/* First address in the virtual address space that is not accessible to user level */

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@ -7,15 +7,7 @@
#pragma once
#include <autoconf.h>
/* Cortex a9 manual, section 10.1.2 */
#define seL4_NumHWBreakpoints (10)
#define seL4_NumExclusiveBreakpoints (6)
#define seL4_NumExclusiveWatchpoints (4)
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstWatchpoint (6)
#define seL4_NumDualFunctionMonitors (0)
#endif
#include <sel4/arch/constants_cortex_a9.h>
/* First address in the virtual address space that is not accessible to user level */
#define seL4_UserTop 0xe0000000

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@ -7,15 +7,7 @@
#pragma once
#include <autoconf.h>
/* Cortex A7 manual, table 10-2 */
#define seL4_NumHWBreakpoints (10)
#define seL4_NumExclusiveBreakpoints (6)
#define seL4_NumExclusiveWatchpoints (4)
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstWatchpoint (6)
#define seL4_NumDualFunctionMonitors (0)
#endif
#include <sel4/arch/constants_cortex_a7.h>
/* First address in the virtual address space that is not accessible to user level */
#define seL4_UserTop 0xe0000000

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@ -7,14 +7,7 @@
#pragma once
#include <autoconf.h>
#define seL4_NumHWBreakpoints (10)
#define seL4_NumExclusiveBreakpoints (6)
#define seL4_NumExclusiveWatchpoints (4)
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstWatchpoint (6)
#define seL4_NumDualFunctionMonitors (0)
#endif
#include <sel4/arch/constants_cortex_a53.h>
#if CONFIG_WORD_SIZE == 32
/* First address in the virtual address space that is not accessible to user level */

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@ -7,14 +7,7 @@
#pragma once
#include <autoconf.h>
#define seL4_NumHWBreakpoints (10)
#define seL4_NumExclusiveBreakpoints (6)
#define seL4_NumExclusiveWatchpoints (4)
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstWatchpoint (6)
#define seL4_NumDualFunctionMonitors (0)
#endif
#include <sel4/arch/constants_cortex_a53.h>
#if CONFIG_WORD_SIZE == 32
/* First address in the virtual address space that is not accessible to user level */

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@ -7,12 +7,4 @@
#pragma once
#include <autoconf.h>
/* Cortex A53 manual, section 11.6.1 */
#define seL4_NumHWBreakpoints (10)
#define seL4_NumExclusiveBreakpoints (6)
#define seL4_NumExclusiveWatchpoints (4)
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstWatchpoint (6)
#define seL4_NumDualFunctionMonitors (0)
#endif
#include <sel4/arch/constants_cortex_a53.h>

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@ -7,12 +7,4 @@
#pragma once
#include <autoconf.h>
/* Cortex A55 manual */
#define seL4_NumHWBreakpoints (10)
#define seL4_NumExclusiveBreakpoints (6)
#define seL4_NumExclusiveWatchpoints (4)
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstWatchpoint (6)
#define seL4_NumDualFunctionMonitors (0)
#endif
#include <sel4/arch/constants_cortex_a55.h>

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@ -7,15 +7,7 @@
#pragma once
#include <autoconf.h>
/* Cortex a8 manual, table 12-11 */
#define seL4_NumHWBreakpoints (8)
#define seL4_NumExclusiveBreakpoints (6)
#define seL4_NumExclusiveWatchpoints (2)
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstWatchpoint (6)
#define seL4_NumDualFunctionMonitors (0)
#endif
#include <sel4/arch/constants_cortex_a8.h>
/* First address in the virtual address space that is not accessible to user level */
#define seL4_UserTop 0xf0000000

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@ -8,13 +8,15 @@
#include <autoconf.h>
/* Cortex A7 manual, table 10-2 */
#define seL4_NumHWBreakpoints (10)
#define seL4_NumExclusiveBreakpoints (6)
#define seL4_NumExclusiveWatchpoints (4)
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstWatchpoint (6)
#define seL4_NumDualFunctionMonitors (0)
/* The QEMU virt platform can emulate various cores */
#if defined(CONFIG_ARM_CORTEX_A15)
#include <sel4/arch/constants_cortex_a15.h>
#elif defined(CONFIG_ARM_CORTEX_A53)
#include <sel4/arch/constants_cortex_a53.h>
#elif defined(CONFIG_ARM_CORTEX_A57)
#include <sel4/arch/constants_cortex_a57.h>
#else
#error "unsupported core"
#endif
/* First address in the virtual address space that is not accessible to user level */

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@ -7,3 +7,14 @@
#pragma once
#include <autoconf.h>
/* The ROCKPro64 uses a RK3399 SOC with a A53/A72 big.LITTLE design. Both cores
* are designed to be identical
*/
#if defined(CONFIG_ARM_CORTEX_A53)
#include <sel4/arch/constants_cortex_a53.h>
#elif defined(CONFIG_ARM_CORTEX_A72)
#include <sel4/arch/constants_cortex_a72.h>
#else
#error "unsupported core"
#endif

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@ -7,15 +7,7 @@
#pragma once
#include <autoconf.h>
/* Cortex a15 manual, section 10.2.2 */
#define seL4_NumHWBreakpoints (10)
#define seL4_NumExclusiveBreakpoints (6)
#define seL4_NumExclusiveWatchpoints (4)
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstWatchpoint (6)
#define seL4_NumDualFunctionMonitors (0)
#endif
#include <sel4/arch/constants_cortex_a15.h>
/* First address in the virtual address space that is not accessible to user level */
#define seL4_UserTop 0xe0000000

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@ -7,15 +7,7 @@
#pragma once
#include <autoconf.h>
/* Cortex A35 Manual Table C7.1 */
#define seL4_NumHWBreakpoints (6)
#define seL4_NumExclusiveBreakpoints (6)
#define seL4_NumExclusiveWatchpoints (4)
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstWatchpoint (6)
#define seL4_NumDualFunctionMonitors (0)
#endif
#include <sel4/arch/constants_cortex_a35.h>
#ifdef CONFIG_ARCH_AARCH32
/* Platform support for tqma8xqp1gb is provided for AARCH64 only, even if the

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@ -7,3 +7,4 @@
#pragma once
#include <autoconf.h>
#include <sel4/arch/constants_cortex_a57.h>

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@ -7,3 +7,10 @@
#pragma once
#include <autoconf.h>
/* Actually, it's a NVIDIA-Denver2/A57 HMP big.LITTLE system */
#if defined(CONFIG_ARM_CORTEX_A57)
#include <sel4/arch/constants_cortex_a57.h>
#else
#error "unsupported core"
#endif

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@ -7,15 +7,7 @@
#pragma once
#include <autoconf.h>
/* Cortex a9 manual, section 10.1.2 */
#define seL4_NumHWBreakpoints (10)
#define seL4_NumExclusiveBreakpoints (6)
#define seL4_NumExclusiveWatchpoints (4)
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstWatchpoint (6)
#define seL4_NumDualFunctionMonitors (0)
#endif
#include <sel4/arch/constants_cortex_a9.h>
/* First address in the virtual address space that is not accessible to user level */
#define seL4_UserTop 0xe0000000

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@ -12,14 +12,7 @@
#error "unknown platform"
#endif
/* Cortex-A53 Manual, Section 11.6.1 */
#define seL4_NumHWBreakpoints (10)
#define seL4_NumExclusiveBreakpoints (6)
#define seL4_NumExclusiveWatchpoints (4)
#ifdef CONFIG_HARDWARE_DEBUG_API
#define seL4_FirstWatchpoint (6)
#define seL4_NumDualFunctionMonitors (0)
#endif
#include <sel4/arch/constants_cortex_a53.h>
#if CONFIG_WORD_SIZE == 32
/* First address in the virtual address space that is not accessible to user level */