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risc-v: simplify integer expression

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There is no need to cast twice.

Signed-off-by: Axel Heider <axelheider@gmx.de>
This commit is contained in:
Axel Heider 2021-11-10 22:15:51 +01:00 committed by Kent McLeod
parent 8e227395a0
commit f9df87b228
1 changed files with 2 additions and 2 deletions
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4
include/arch/riscv/arch/32/mode/machine.h
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@ -24,7 +24,7 @@ static inline uint64_t riscv_read_time(void)
asm volatile("rdtime %0\n" : "=r"(nL));
nH1 = nH2;
}
return ((uint64_t)((uint64_t) nH1 << 32)) | (nL);
return ((uint64_t)nH1 << 32) | nL;
}
@ -42,5 +42,5 @@ static inline uint64_t riscv_read_cycle(void)
asm volatile("rdcycle %0\n" : "=r"(nL));
nH1 = nH2;
}
return ((uint64_t)((uint64_t) nH1 << 32)) | (nL);
return ((uint64_t) nH1 << 32) | nL;
}