portugalfuturista/seL4
2
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

SMP: use C++11 __atomic builtins instead of legacy __sync buitins

Browse source
This commit is contained in:
Hesham Almatary 2017-01-16 15:27:58 +11:00
parent af02927b69
commit ffc18fe880
2 changed files with 4 additions and 5 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

7
include/smp/lock.h
View file

@ -73,7 +73,7 @@ clh_lock_acquire(word_t cpu)
/* rely on the full barrier implied by the GCC builtin*/
prev = __atomic_exchange_n(&big_kernel_lock.head,
big_kernel_lock.node_owners[cpu].node, __ATOMIC_ACQ_REL);
big_kernel_lock.node_owners[cpu].node, __ATOMIC_ACQUIRE);
big_kernel_lock.node_owners[cpu].next = prev;
while (big_kernel_lock.node_owners[cpu].next->value != CLHState_Granted) {
@ -92,9 +92,8 @@ clh_lock_acquire(word_t cpu)
static inline void FORCE_INLINE
clh_lock_release(word_t cpu)
{
/* make sure no resource access passes from this point,
* no need to have any full barrier due x86 TSO memory ordering */
asm volatile("" ::: "memory");
/* make sure no resource access passes from this point */
__atomic_thread_fence(__ATOMIC_RELEASE);
big_kernel_lock.node_owners[cpu].node->value = CLHState_Granted;
big_kernel_lock.node_owners[cpu].node =

2
src/arch/x86/kernel/ipi.c
View file

@ -52,7 +52,7 @@ static inline void ipi_wait(word_t cores)
{
word_t localsense = ipiSyncBarrier.globalsense;
if (__sync_fetch_and_add(&ipiSyncBarrier.count, 1) == cores) {
if (__atomic_add_fetch(&ipiSyncBarrier.count, 1, __ATOMIC_ACQ_REL) == cores) {
ipiSyncBarrier.count = 0;
ipiSyncBarrier.globalsense =
~ipiSyncBarrier.globalsense;