Commit graph

397 commits

Author SHA1 Message Date
Adrian Danis
45622671de x86: Define large frame types 2016-10-06 07:39:25 +11:00
Adrian Danis
602836a21b x86: Generic setCurrentVSpaceRoot
Defines a generic setCurrentVSpaceRoot to replace setCurrentPD in
mode generic code
2016-10-06 07:39:25 +11:00
Adrian Danis
74cb86c202 x86: Support for syscall
syscall/sysret is an additional way of performing kernel entry/exits.
Whilst the instructions themselves are not supported when running
in 32-bit mode, this commit provides the config choice for them as
well as the generic support code for them.
2016-10-06 07:39:24 +11:00
Adrian Danis
d72cd75136 x86: Rename invalidateTLBentry->invalidateTLBEntry 2016-10-05 16:40:43 +11:00
Anna Lyons
7336303b7f SELFOUR-276: Add MCP field to threads.
Where MCP = Maximum Controlled Priority

This commit adds:

* seL4_TCB_SetMCPriority

and changes the arguments to

* seL4_TCB_Configure

As of this commit, a thread cannot create or set a threads
priority (including itself) above its mcp. Previously the kernel
did this check against a threads priority, which prevented a thread
from setting it's own priority down and then up again.
2016-10-05 11:11:19 +11:00
Adrian Danis
43772b2dc2 x86: Rename decodeIA32PortOperation->decodeX86PortOperation 2016-10-04 11:17:35 +11:00
Adrian Danis
2320d90904 x86: Fixup IOMMU implementation
Adds a mapping type to frame caps that tracks
what kind of hierarchy the cap is mapped into;
an MMU, IOMMU and in the future an EPT structure.

Additionally the IOMMU code is updated to
have correct functionality and be verification
friendly.
2016-09-29 16:11:11 +10:00
Kofi Doku Atuah
b1f8d21e96 TK1: Split the mux controller from the misc region
The TK1 manual's address map has a 16K MMIO region called the "Misc" region,
where they lump together several controllers that aren't all page aligned,
including a USB controller and a SATA controller of some kind.

They also lump the pinmux controller into this "misc" region, but the
pinmux controller is at a page aligned boundary, and has no other devices
sharing that page, so it can be split off into its own device untyped.

This also makes it easier to request that mapping from userspace.
2016-09-29 15:13:16 +10:00
amrzar
2cbc7123b6 SELFOUR-630:preliminary booting application processors
- update core detection code and Kconfig file
    - update kernel stack managment so that BSP does not use boot stack before IPI APs
    - move arch dependant data to a single structure
    - add cache line size to Kconfig
    - add cpu indexing and apic id mapping
    - boot APs to halting state
    - add guard for kernel stack if there is only one core
2016-09-28 16:10:25 +10:00
Adrian Danis
017cb20b78 arm: Move ACTLR functions out of pl2 headers
The ACTLR register is not a PL2 exclusive register, and is architecturally
defined to exist (although the contents of the register are implementation defined).
2016-09-27 09:34:29 +10:00
Anna Lyons
6f00118314 trivial: move ksKernelEntry definition
so debug builds can see it. Not sure how this built previously?
2016-09-23 15:13:38 +10:00
Adrian Danis
2a84b7d792 Merge pull request #120 in SEL4/sel4 from ~ADANIS/sel4:deviceuntyped to master
* commit '8e77cdb5e91e971f49747492a3350c2b443a3827':
  SELFOUR-421: Add padding for untyped in bootinfo
  SELFOUR-421: minor changes for c-refine
  SELFOUR-421: fix up boolean equality in Arch_sameObjectAs
  SELFOUR-421: added device check to sameObjectAs
  SELFOUR-421: Arch_createObject changed to use new user_data_device in ghostupdates for device pages
  SELFOUR-421 Introduce explicit device frames and untypeds
2016-09-23 04:16:22 +00:00
Joel Beeren
2d74ae7eb8 SELFOUR-421: Arch_createObject changed to use new user_data_device in ghostupdates for device pages 2016-09-23 14:15:09 +10:00
Adrian Danis
d507b2d39e SELFOUR-421 Introduce explicit device frames and untypeds
Kernel objects cannot be created from device untypeds, with the
exception of frames, which do not get zeroed and cannot be used
as an IPC buffer. Device untypeds additionally cannot be used
in the construction of ASID pools.

This then changes the API to the rootserver (i.e. bootinfo) to
send device untypeds instead of device frames. On ARM these
device untypeds are the same as the previously exported device
frame regions. On x86 PCI scanning is removed and all physical
memory addresses (that are not important for kernel integrity)
are released to the user.

In order to have bits in the frame and untyped caps on ARM the
number of software ASIDs had to be reduced from 2^18 to 2^17,
and the maximum untyped size reduced from 2^31 to 2^30
2016-09-23 14:15:08 +10:00
Kofi Doku Atuah
97a9b9ab9e Fix TCB Max-name-length macro
The previous macro computed to (0 - sizeof(tcb_t)). Basically a negative
number, which is just a really big unsigned number, so this macro was
basically allowing TCB naming of any length.
2016-09-22 15:37:34 +10:00
Adrian Danis
4044e20412 Revert "Merge pull request #358 in SEL4/sel4 from ~AZARRABI/sel4:multicore to master"
This reverts commit ce2f666bb8, reversing
changes made to dc183f96b8.
2016-09-22 14:22:18 +10:00
Adrian Danis
8ffc353172 Revert "[STYLE_FIX]"
This reverts commit d29f743bbc.
2016-09-22 14:22:08 +10:00
Adrian Danis
7f4694ec3e pc99: Update standalone config with CACHE_LN_SZ 2016-09-22 14:10:08 +10:00
Bamboo
d29f743bbc [STYLE_FIX] 2016-09-22 04:01:23 +00:00
Amirreza Zarrabi
ce2f666bb8 Merge pull request #358 in SEL4/sel4 from ~AZARRABI/sel4:multicore to master
* commit 'fbc071b4f11b3d7d423e26908a661f416b07cda2':
  SELFOUR-630:preliminary booting application processors - update core detection code and Kconfig file - update kernel stack managment so that BSP does not use boot stack before IPI APs - move arch dependant data to a single structure - add cache line size to Kconfig - add cpu indexing and apic id mapping - boot APs to halting state - add guard for kernel stack if there is only one core
2016-09-22 03:59:32 +00:00
Kofi Doku Atuah
df6fe18acf Link libsel4's macros.h into the kernel
Also, include libsel4 macros.h link in types.h.
2016-09-21 13:57:44 +10:00
amrzar
fbc071b4f1 SELFOUR-630:preliminary booting application processors
- update core detection code and Kconfig file
- update kernel stack managment so that BSP does not use boot stack before IPI APs
- move arch dependant data to a single structure
- add cache line size to Kconfig
- add cpu indexing and apic id mapping
- boot APs to halting state
- add guard for kernel stack if there is only one core
2016-09-21 12:14:10 +10:00
Hesham Almatary
9e104c1626 Merge pull request #353 in SEL4/sel4 from ~HALMATARY/sel4:BenchmarkReset to master
* commit '8808ba7fa00591528c1c730c6cfeb4ee6ef82e8b':
  Benchmark: Implement per-thread reset syscall
2016-09-20 00:22:49 +00:00
Kent McLeod
41ec5cf754 SELFOUR-537: Support for raspberry pi3 2016-09-19 15:53:53 +10:00
Stephen Sherratt
5a0bdb7480 Store active irq in global variable on kzm
The first time the irq number is read from the controller, the interrupt
is acknowledged. Subsequent reads of the irq number result in an invalid
irq number being read.

This modifies the kzm interrupt controller driver to save the current irq
number when it's first read from the interrupt controller, preventing the
need for future reads from the controller until the next interrupt arrives.
2016-09-14 13:43:35 +10:00
Hesham Almatary
8808ba7fa0 Benchmark: Implement per-thread reset syscall 2016-09-12 13:54:12 +10:00
Adrian Danis
4491cae521 SELFOUR-556: Rationalize BITS vs INDEX_BITS
s/PGD_BITS/PGD_INDEX_BITS
Current convention is to say that X_BITS is the log base 2
size of an object, not the log base 2 number of indices
2016-08-31 09:24:47 +10:00
Adrian Danis
35c50cfdaf SELFOUR-556: Rationalize BITS vs INDEX_BITS
s/PD_BITS/PD_INDEX_BITS
Current convention is to say that X_BITS is the log base 2
size of an object, not the log base 2 number of indices
2016-08-31 09:24:47 +10:00
Adrian Danis
3cde4fa8f3 SELFOUR-556: Rationalize BITS vs INDEX_BITS
s/SMMU_PD_BITS/SMMU_PD_INDEX_BITS
Current convention is to say that X_BITS is the log base 2
size of an object, not the log base 2 number of indices
2016-08-31 09:24:47 +10:00
Adrian Danis
f251953f60 SELFOUR-556: Rationalize BITS vs INDEX_BITS
s/PT_BITS/PT_INDEX_BITS
Current convention is to say that X_BITS is the log base 2
size of an object, not the log base 2 number of indices
2016-08-31 09:24:47 +10:00
Adrian Danis
1103e5a30b SELFOUR-556: Rationalize BITS vs INDEX_BITS
s/ASID_POOL_BITS/ASID_POOL_INDEX_BITS
Current convention is to say that X_BITS is the log base 2
size of an object, not the log base 2 number of indices
2016-08-31 09:24:47 +10:00
Adrian Danis
bbc98573e7 SELFOUR-556: Rationalize BITS vs INDEX_BITS
s/VTD_PT_BITS/VTD_PT_INDEX_BITS
Current convention is to say that X_BITS is the log base 2
size of an object, not the log base 2 number of indices
2016-08-31 09:24:47 +10:00
Adrian Danis
935b055c5e SELFOUR-556: Rationalize BITS vs INDEX_BITS
s/PDT_BITS/PDPT_INDEX_BITS
Current convention is to say that X_BITS is the log base 2
size of an object, not the log base 2 number of indices
2016-08-31 09:24:47 +10:00
Bamboo
f4188c6cd3 [STYLE_FIX] 2016-08-31 08:59:24 +10:00
Amirreza Zarrabi
92c95c8f0e Merge pull request #335 in SEL4/sel4 from ~AZARRABI/sel4:halt_recur to master
* commit '57f1352ff70cb2de18768174d257d151e4fd12e8':
  SELFOUR-614: calling halt() on the hikey platform results in infinite data abort SELFOUR-408: halt does not halt
2016-08-30 22:19:00 +00:00
Thomas Sewell
702f8c6902 Fix prototyping for constant address pointers.
Previous change adf91d4be0
introduces const inconsistently for two pointers.
2016-08-29 13:58:43 +10:00
Hesham Almatary
fb19c78e12 Benchmark: Share trace point log structure with the user 2016-08-26 11:13:05 +10:00
Hesham Almatary
5ef4cbfa7f Benchmark: Fix bug when trace points enabled with user-level log buffer
After the user-level log buffer addition, any code that writes to the log must
check if the user has already set a log buffer properly.
2016-08-25 10:54:11 +10:00
Bamboo
362e41f285 [STYLE_FIX] 2016-08-24 11:40:27 +10:00
Anna Lyons
ada2fc5f14 SELFOUR-624: fix ia32 debug build
- separate putDebugChar and putConsoleChar
- this only has effect on x86 where 2 serial ports are initialised by
  the kernel
- for arm, putConsoleChar just calls putDebugChar
2016-08-24 11:10:12 +10:00
Anna Lyons
e2bc428df4 style 2016-08-24 10:42:36 +10:00
Anna Lyons
ef00e98689 SELFOUR-615: arm entry point stubs 2016-08-24 10:42:36 +10:00
Adrian Danis
e0f8111faa move benchmark code from arch hooks 2016-08-24 10:42:36 +10:00
Adrian Danis
5466105cb9 call arch entry hook from C entry hook 2016-08-24 10:42:36 +10:00
Adrian Danis
4c57e6e577 define arch entry hooks instead 2016-08-24 10:42:36 +10:00
Adrian Danis
a217102b4e Consolidate benchmark entry/exit
Move the benchmark pre/post ambles into the now existing entry/exit
hook functions
2016-08-24 10:42:36 +10:00
Adrian Danis
3c05b79a6e Provide generic C entry/exit hook routines
It can be deseriable to run code before/after user mode, but
not have to write it in assembly. This commit adds such stubs
that get called as the first/last C code when coming in
and out of the kernel
2016-08-24 10:42:36 +10:00
amrzar
57f1352ff7 SELFOUR-614: calling halt() on the hikey platform results in infinite data abort
SELFOUR-408: halt does not halt

Remove assembly files for halt and idle thread and add wfi in armv.
2016-08-23 14:49:30 +10:00
Anna Lyons
c0817f4979 Merge pull request #339 in SEL4/sel4 from ~ALYONS/sel4:bye-lcok to master
* commit '5bd050f42fa6957a43db4ab20735f10d11f60bcd':
  trivial: x86 remove unused lock.[c|h]
2016-08-23 03:11:52 +00:00
Anna Lyons
5bd050f42f trivial: x86 remove unused lock.[c|h] 2016-08-23 11:41:26 +10:00