Commit graph

838 commits

Author SHA1 Message Date
Adrian Danis
c8eb525782 pc99: Make hardware.h usable from assembly
Rearranges hardware.h and makes use of the UL_CONST macro so that the header can be
included into assmebly files for its definitions
2018-01-09 14:13:41 +11:00
Adrian Danis
5247240a09 Implement UL_CONST macro for assembly and C
The UL_CONST macro provides a way to declare a constant that may or may not have a UL
suffix. In the case of assembly the UL suffix will be an error to many assemblers and
is not needed.
2018-01-09 14:13:41 +11:00
Adrian Danis
8d0b13c640 Token pasting helper
Adds utility macro for creating new tokens by token pasting
2018-01-09 14:13:41 +11:00
Adrian Danis
d43b717ef1 Move PAD_TO_NEXT_CACHE_LN to util.h
This utility macro is useful beyond just SMP code
2018-01-09 10:10:16 +11:00
Adrian Danis
570c1a65b0 Compile time abstraction for calling getCurrentCPUIndex
This defines a CURRENT_CPU_INDEX() macro that resolves to a constant 0 in the absence of
SMP, or a call to getCurrentCPUIndex in the presence of SMP. This provides a way to use
per-core data structures, without additional guards, in a way that is nearly invisible
to verification
2018-01-08 10:30:06 +11:00
Adrian Danis
252e0a82a7 aarch64: Declare base pointer size to be 48 bits to match x86
This matches the change in ee96314840
2017-12-20 16:13:43 +11:00
Adrian Danis
9f9578a7ae aarch64: Restrict USER_TOP to virtual addresses without high bits
Restricting virtual addresses to essentially be only addresses without bit 47 set
allows us to not need to check that an address passed in by the user is canonical
or not. Any address that is in danger of not being canonical (has bit 47 set but
not bits 48 to 63) will all by higher than USER_TOP and will not be permitted.
2017-12-20 16:11:06 +11:00
Adrian Danis
ee96314840 x64: Declare virtual addresses as 48-bits instead of 49-bits
In f6d367e8df virtual addresses were changed from 48
bits to 49 bits, but this does not seem necessary and the commit does not have enough
detail to justify the change. As such it is being changed back to 48 bits in this
commit, which is far less confusing and results on the bitfield generated functions
switching on bit 47 to determine sign extension (instead of bit 48), which matches
what the hardware description says should be done.
2017-12-19 16:13:08 +11:00
Anna Lyons
6d25d1e94a Fix armv6 CCNT definition 2017-12-19 13:46:09 +11:00
Adrian Danis
8639dbcaea Abstractly declare a threads registers have changed
This removes an #ifdef for x86-64 that was in generic code by declaring the generic
mechanism that is being used as an Arch_ function
2017-12-13 12:09:14 +11:00
Anna Lyons
8576758abf Define SchedulerAction_ChooseNewThread as 1
1 is never a valid tcb, and ~0 on x64 results in 0x00000000FFFFFFFF,
which could be a valid tcb.
2017-12-13 11:47:56 +11:00
Alexander Boettcher
734320d717 x86: add framebuffer info of MBI2 via boot_info 2017-11-30 22:54:01 +01:00
Alexander Boettcher
de610c22b6 x86: evaluate ACPI RSDP v1 multiboot 2 information 2017-11-28 16:25:07 +11:00
Alexander Boettcher
a4a52c5dcb pc99: Explicitly declare sizes for different versions of ACPI RSDP 2017-11-28 16:25:07 +11:00
Claudia Tu
1fc281e751 Add CONFIG_ to syscall.c and add missing include file 2017-11-28 14:24:40 +11:00
Bamboo
a32264bfb5 [STYLE_FIX] 2017-11-28 00:02:37 +00:00
Anna Lyons
cddc4e6ef5 Inline resetTimer for all platforms
- for arm generic timer platforms, we remove resetTimer ->
resetGenericTimer indirection and simply include generic_timer.h
- this reduces boiler plate for platforms that share timer drivers, as
  they simply include the one header
- there is far more timer code in the RT kernel, which motivates this
change
2017-11-28 10:21:46 +11:00
Anna Lyons
31b8c158ba Trivial: add missing guards 2017-11-28 10:21:46 +11:00
Anna Lyons
5ec0a36f86 Move arm generic timer initTimer to c file
This prepares to inline the resetTimer definition from generic_timer.h
without creating a mess of circular includes
2017-11-28 10:21:46 +11:00
Anna Lyons
7fd2783653 Refactor mct.c into mct.h and hardware.c
This prepares for inlinining the generic timer in header files, which will reduce the
redundancy for all platforms that use it.

Since mct.c shared code with the generic timer, both could not define a
resetTimer function. This commit splits the logic and definitions used
by exynos4 and exynos4* into common definitions in mct.h, with the
unique code for both in hardware.c
2017-11-28 10:21:46 +11:00
Anna Lyons
c89b9828db Make TIMER_CLOCK_HZ available in timer.h for ARM
The RT kernel needs this value accessible to common functions.
2017-11-28 10:21:46 +11:00
Anna Lyons
de45ae1457 Move arm generic timer to own header
Only platforms that use it should include the code
2017-11-28 10:21:46 +11:00
Anna Lyons
2f7d3bb9b0 Move definition of initTimer to be arm specific
initTimer does not exist on x86
2017-11-28 10:21:46 +11:00
Anna Lyons
1a408880f1 Add a timer.h for all ARM platforms. 2017-11-28 10:21:46 +11:00
Adrian Danis
8028066a65 ksSchedulerAction contains candidate thread instead of target thread
Instead of switching to the thread contained in `ksSchedulerAction` on a `schedule` we
instead decide between the 'candidate' contained in `ksSchedulerAction`, the current thread
or potentially neither if the candidate is deemed invalid and the current thread is blocked.

A consequence of this change is that it is no longer meaningful to have a distinction between
`switchIfRequiredTo` and `attemptSwitchTo`. Now both these cases simply identify a candidate,
which may or may not be picked in `schedule`. Part of the distinction of `switchIfRequiredTo`
was to not avoid switching if possible when performing notifications. This is now handled by
prefering the current thread over the candidate if the current thread has not blocked.

This change is largely semantic preserving overall, with the exception of non-blocking
synchronous sends now acting like notifications and also preferring to resume running the
current thread.

The motivation for this change was to make it much easier for verification to show
correspondence between the fastpath changes introduced in the previous commit and the
slowpath scheduler.
2017-11-28 10:18:35 +11:00
Adrian Danis
780b13dad9 Provide isHighestPrio helper 2017-11-28 10:18:35 +11:00
Adrian Danis
d40868b933 Invert priority order of scheduler bitmap
Provides better cache performance for high priority threads
2017-11-28 10:18:35 +11:00
Adrian Danis
a2409b9888 getHighestPrio calculation as a wrapper
Moves the logic from chooseThread into a dedicated helper function
2017-11-28 10:18:35 +11:00
Adrian Danis
c6e4cc3ea1 Correct L2 bitmap size calculation and put it in one place
This corrects the calculation of the L2 bitmap size to correctly handle cases where the
requested num priorities is not a clean multiple of the wordBits
2017-11-28 10:18:35 +11:00
Anna Lyons
8397feae4a aarch64: implement cycle counter, PMU
- add timestamp(), timestamp_t for aarch64
- implement CONFIG_EXPORT_PMU_USER
2017-11-28 10:14:12 +11:00
Anna Lyons
e753404913 Provide a general ARM timestamp function
Use SYSTEM_READ_WORD, each platform defines the CCNT constant.
2017-11-28 10:14:12 +11:00
Anna Lyons
3017f9b72a Move timestamp_t definition to types.h
it was causing circular references in files where it is defined and
hardware macros are also used.
2017-11-28 10:13:49 +11:00
Hesham Almatary
3d2ae69f9c ARM/SMP: Re-implement atomic exchange taking sel4 IPI into account 2017-11-23 14:35:54 +11:00
Anna Lyons
49a26db19d Combine common arm generic timer code
Previously both aarch32 and aarch64 duplicated common
generic timer code. Unify them in include/arch/arm/machine/timer.h
2017-11-20 14:37:55 +11:00
Anna Lyons
3de2b5cfe9 Initialise gpt_cnt_tval to squash compiler warning 2017-11-20 14:37:55 +11:00
Anna Lyons
fff4f1b580 Make TIMER_RELOAD check 64-bit compatable
This check checks the TIMER_RELOAD fits in the wordsize.
Use UINTPTR_MAX instead of 0xffffffff so the check can be moved
to mode agnostic code.
2017-11-20 14:37:55 +11:00
Anna Lyons
cb81478015 aarch64: add constants for generic timer
This brings the aarch64 generic timer into exactly the same code as
the aarch32 generic timer.
2017-11-20 14:37:55 +11:00
Anna Lyons
c11f18cbf3 ARM generic timers: use aarch agnostic macros 2017-11-20 14:37:55 +11:00
Anna Lyons
07d796790a Add generic macros for aarch32/64 system access
This commit generalises 32 and 64 bit configuration for arm: 32bit uses
coprocessor access through mrc/mcr, 64bit system configuration through
msr,mrs

- SYSTEM_READ|WRITE_WORD: read or write configuration word
- SYSTEM_READ|WRITE_64  : read or write 64bits of configuration
2017-11-20 14:37:55 +11:00
Anna Lyons
4b2114782c Add stdint MAX definitions
- UINTPTR_MAX
- UINT64_MAX
- UINT32_MAX
- INT64_MAX
- INT32_MAX
2017-11-17 14:49:27 +11:00
Adrian Danis
9d4010e0b3 Print single IRQ error
`Arch_checkIRQ` already prints an error message in the case of x86. Printing the additional
error message is both unnecessary, confusing as the message makes no sense on x86. As the
error does make sense on ARM this commit moves the message to the arm `Arch_checkIRQ`
2017-11-10 11:37:34 +11:00
Joel Beeren
092042f7c5 x64: add MODIFIES statements for extern functions
The CParser can't deduce modifies rules for functions without
definitions (like in8, out8 et al and interrupt handler functions).
This adds explicit modifies rules for these functions.
2017-11-09 12:18:31 +11:00
Adrian Danis
4e121d0c48 smp: Use explicit fences instead of volatile
This provides a more robust and efficient implementation that only forces memory reloads
at explicit known points, instead of the over approximation of every time they are
accessed that is forced by volatile.
2017-11-03 11:39:32 +11:00
Adrian Danis
d2644e8ab7 Declare and check IPC buffer size
Adds a named constant of the IPC buffer size bits that can be used when checking the
size/alignment of an IPC buffer. This constant has a compile time assertion to ensure
it corresponds to the actual IPC buffer
2017-10-27 16:12:18 +11:00
Adrian Danis
15c0f0eb75 Increase badge size for endpoints on 64-bit platforms
This unifies the badge size of endpoints and notifications on 64-bit platforms to a
consistent 64-bits, and also changes the libsel4 definitions to match for both.
2017-10-27 12:15:09 +11:00
Adrian Danis
b5854775a5 Increase size of guards on 64-bit platforms
The maximum guard size was unnecessarily restricted to 18 bits as it is on 32-bit
platforms. This change increases it to the current maximum possible of 58 bits.
The 58-bit limitation exists due to the need to encode a guard+guardsize into a
single word for cnode invocations.
2017-10-27 12:15:09 +11:00
Adrian Danis
5f4640dc6c Move cnode_capdata to libsel4 shared types bitfield
This data structure is meant to be the user visible format of the data for a cnode_cap,
yet it is defined in a kernel only bitfield file. Moving it to libsel4 opens up the
possibility of consolidating the definitions in libsel4
2017-10-27 12:14:44 +11:00
Hesham Almatary
00a0577790 Benchmark: account for thread utils on 64-bit archs' fastpath 2017-10-27 09:32:56 +11:00
Adrian Danis
18db530231 Abstract zombie word radixes
Zombie caps perform bit packing that relied on the log2(wordBits), which was being
hard coded to 5. Whilst 5 is the correct value on 32-bit platforms, it is incorrect
on 64-bit ones. This changes the previously hardcoded 5 to be the, already existing,
wordRadix definition.
2017-10-26 11:50:51 +11:00
Adrian Danis
827d9f9705 Merge branch master into zcu102-7.0.0 2017-10-26 11:49:45 +11:00