Commit graph

3469 commits

Author SHA1 Message Date
Siwei Zhuang
0d93997463 ariane: Remove unused dts overlay
Ariane platform doesn't have any kernel devices. But the DTS parser
doesn't accept empty properties. Removing it completely to avoid DTS
parsing error.
2019-11-26 16:10:21 +11:00
Kent McLeod
4d21d40b1e gcc.cmake: Add option for coloured gcc output
Setting the environment variable GCC_COLORS or CMake option
FORCE_COLORED_OUTPUT will cause GCC's colour messages to be outputted.
2019-11-26 08:58:34 +11:00
Kent McLeod
60ffdb1f0a trivial: Fix x86 KERNEL_TIMER_IRQ definition
This was using the hardware irq number instead of the irq number seL4
uses. This change affects MCS preemption point handling.
2019-11-26 08:49:46 +11:00
Victor Phan
cdbae0b3b2 riscv: update page table level numberings
The numberings are changed from 1,2,... to 0,1,...
2019-11-22 12:21:09 +11:00
Victor Phan
66bc2b1724 rename KDEV_PPTR/PPTR_KDEV to KDEV_BASE
This is the virtual address for the start of the kernel device mapping
region.
2019-11-21 15:53:11 +11:00
Bamboo
e5a986af0c Update VERSION file to 11.0.0-dev 2019-11-20 18:17:11 +11:00
Bamboo
ff21602504 Release 11.0.0
Update VERSION
Update CHANGES
2019-11-20 18:17:11 +11:00
Kent McLeod
eec474dcc8 Update CHANGES with changes since last release
Try to add all missing changes that affect the seL4 interface.
2019-11-20 18:16:21 +11:00
Simon Shields
eb2bdf8463 trivial: remove duplicate macro definition 2019-11-19 16:37:51 +11:00
Oliver Scott
beede2ad85 mcs: add mcs for imx8mmq
Move TICKS_PER_MS out of ifdef guard,
so that the gicv3 can find it.
Turn of buildsystem check for mcs.
Add magic constants to config.
2019-11-19 14:33:29 +11:00
Sylvain Gauthier
2fdee6070b Added virtualization support on qemu-arm-virt
Added hypervisor support on the qemu-arm-virt platform. Required a few
changes in the gic_v2 driver to not reroute interrupts to group 1. Set
secure mode to 'off' in qemu for the elf-loader to work.
2019-11-18 10:59:27 +11:00
Sylvain Gauthier
a1d1124de9 [virt] Updated to qemu 3.1, added version check
Added a check for the user's qemu version, generates a warning if less
than 3.1. This is important because the DTS QEMU generates for the virt
platform is slightly different between versions and can (will) clash
with our overlays.
2019-11-18 10:59:27 +11:00
Axel Heider
57872537e3 cmake: fix variable name, ARM_PLAT instead of PLAT 2019-11-17 09:58:02 +11:00
Axel Heider
49dd638a8a cmake: add helper functions 2019-11-16 16:31:00 +01:00
Alexander Boettcher
6b8c09a6d9 x86: always invalidate TLB during unmapPage
On SMP configurations, the VSpace may be in use on other cores and so a
TLB shoot down has to be performed unconditionally.
2019-11-14 09:06:37 +11:00
Simon Shields
b5c56244f1 Create device untypeds at boot for all arches
Currently on x86 device untypeds are generated by passing the entire
address space minus any parts that are reserved by the kernel or that
are "real" memory (e.g. kernel image, physical RAM).

On ARM and RISC-V, device untypeds were generated at compile-time from
a device tree. This patch moves ARM and RISC-V to use the same approach
as x86, and moves the code from x86 into a common location that's
shared between the three architectures.

Co-Authored-By: Anna Lyons <anna@gh.st>
2019-11-12 16:20:07 +11:00
Simon Shields
28c1ff4b4b kernel: set maximum user paddr in build system
expose the maximum physical address that can be given to userspace
for use in hardware_gen.py
2019-11-12 16:20:07 +11:00
Simon Shields
75ee55a8fd hardware: expose rpi3 intc region to userspace
the intc region contains a timer that userspace uses on the MCS kernel.
2019-11-12 16:18:33 +11:00
Simon Shields
cc655275f4 spike: remove unneeded empty seL4,kernel-devices
hardware_gen assumes this prop is empty if it isn't specified.
2019-11-12 16:18:33 +11:00
Simon Shields
294b592bb1 trivial: hardware.yml: clean up indentation 2019-11-12 16:18:33 +11:00
Simon Shields
82084ad92b hardware_schema: simplify and clarify schema
The two interrupt-related 'macros' are rather confusingly different.
Explain them, rename them and simplify interrupt specification while
we're at it.
2019-11-12 16:18:33 +11:00
Simon Shields
cdb6a093d4 hardware: remove executeNever
this is now implicitly true. MMIO regions should always be executeNever.
2019-11-12 16:18:33 +11:00
Simon Shields
7a26d271c3 hardware: change region logic in hardware yaml
- we're going to switch to mapping the whole address space, excluding
parts used by the kernel, to userspace. We trust the root server anyway,
so giving it extra (possibly invalid) MMIO space just simplifies stuff
on the kernel end.
- drop the hacky true/false/null 'user' flag in favour of a saner
true/false one.
- remove support for 'default' regions. By default we will pass unused
regions through to userspace.
2019-11-12 16:18:33 +11:00
Simon Shields
75f2c54b42 tools: rewrite hardware_gen.py
This is almost a complete rewrite from the old hardware_gen.py.

It separates the 'parse DT' stage from the 'generate output'
devices more strictly, and is hopefully easier to understand and
easier to extend.

We also no longer generate the 'devices' list (in YAML)
or the dev_p_regs array (in C), as the kernel will implicitly
expose all non-RAM untypeds as devices.
2019-11-12 16:18:33 +11:00
Siwei Zhuang
6e3606d056 RISCV: Add support for Ariane SoC
Support Ariane SoC platform running on Genesys 2 FPGA board.
2019-11-05 12:15:31 +11:00
Jimmy Brush
e460b934b1
trivial: fix typos in manual 2019-10-30 00:43:57 -04:00
Corey Lewis
7889580a7d mcs: Refactor reply_push
This removes an unnecessary if and asssert, and simplifies the proofs.
2019-10-25 15:41:14 +11:00
Oliver Scott
b5a39a92a9 trivial: update licence 2019-10-25 14:18:20 +11:00
Oliver Scott
9abe8a4f0b add support for rockpro64
Kernel support for 64 bit rockpro board.
Dts was taken from the linux kernel.
2019-10-25 14:18:20 +11:00
Axel Heider
5c700c15a2 output: use CR LF as line break and not LF CR 2019-10-25 02:18:02 +02:00
G. Branden Robinson
5e7f50e835 config.cmake: fix typo
Discovered at IEEE SecDev 2019 when someone asked about binary
verification and optimisation levels.
2019-10-24 14:23:17 +11:00
Kent McLeod
a5148a1957 exynos: Move mct MCS functions to specific header
On exynos5 platforms the Arm Generic timer is available and is used for
MCS, but the mct.h is still used as the mct device needs to be
configured to implement the Arm Generic timer. mct.h is a common header
for register definitions while exynos4412-mct.h is used for implementing
timer functions on the exynos4 where the mct doesn't support being the
Arm generic timer.

Also remove misplaced initGenericTimer() declaration.
2019-10-23 16:30:17 +11:00
Oliver Scott
cd956d5769 bbone-MCS: add mcs
Add MCS functionality to bboneblack platform.
2019-10-22 16:31:58 +11:00
Oliver Scott
8fd26bd759 bbone-MCS: kernel switch to dmtimer4
The kernel was originally using dmtimer0
which had a fixed clock speed not fast enough
for mcs.
2019-10-22 16:31:58 +11:00
Sylvain Gauthier
4efbd4365e Updated CHANGES file
Updated CHANGES file to add virt support.
2019-10-14 15:46:08 +11:00
Sylvain Gauthier
5ffb2a1bc1 Added the new virt platform
`virt` is a QEMU virtual platform that support 3 ARM CPUs.
2019-10-14 15:46:08 +11:00
Oliver Scott
7dc6b23ef9 exynos4: MCS timer
Add required functionality for MCS.
2019-10-11 11:16:47 +11:00
Yanyan Shen
1cb5887abe trivial: Update CHANGES 2019-10-10 17:26:17 +11:00
Yanyan Shen
834dda6756 trivial: Remove unused code 2019-10-10 17:22:06 +11:00
Yanyan Shen
2719999046 trivial: Fix style 2019-10-10 17:22:06 +11:00
Yanyan Shen
17b6f2a265 trivial: Replace asm with fence_rw_rw() 2019-10-10 17:22:06 +11:00
Yanyan Shen
db3c4ff44f riscv: Guard SMP inlines with the macro
Guard the added SMP inline functions with the ENABLE_SMP_SUPPORT.
2019-10-10 17:22:06 +11:00
Yanyan Shen
0a6df5fc87 riscv: Remove IPI functions when SMP is off
Remove ipi_get_irq() and ipi_clear_irq() when SMP is not enabled.
2019-10-10 17:22:06 +11:00
Yanyan Shen
e7957006e5 trivial: Correct year 2019-10-10 17:22:06 +11:00
Yanyan Shen
fbc70aa02f riscv: Use inline functions to replace inline asm
Use inline functions to replace inline assembly.
2019-10-10 17:22:06 +11:00
Yanyan Shen
b32c0b8dcb riscv: Add fence_r_rw() and fence_w_r()
Add more memory fences.
2019-10-10 17:22:06 +11:00
Yanyan Shen
860ab65d01 trivial: Fix compile error when debug is off 2019-10-10 17:22:06 +11:00
Yanyan Shen
a45f389704 trivial: Fix style 2019-10-10 17:22:06 +11:00
Yanyan Shen
582e6e2646 riscv: SMP option
Allow to enable the SMP option for RISCV.
2019-10-10 17:22:06 +11:00
Yanyan Shen
a269298c71 riscv: Flush pipeline and instruction cache
Flush the instruction cache and pipeline when handling
a reschedule IPI.
2019-10-10 17:22:06 +11:00