Commit graph

810 commits

Author SHA1 Message Date
Adrian Danis
c6e4cc3ea1 Correct L2 bitmap size calculation and put it in one place
This corrects the calculation of the L2 bitmap size to correctly handle cases where the
requested num priorities is not a clean multiple of the wordBits
2017-11-28 10:18:35 +11:00
Anna Lyons
8397feae4a aarch64: implement cycle counter, PMU
- add timestamp(), timestamp_t for aarch64
- implement CONFIG_EXPORT_PMU_USER
2017-11-28 10:14:12 +11:00
Anna Lyons
e753404913 Provide a general ARM timestamp function
Use SYSTEM_READ_WORD, each platform defines the CCNT constant.
2017-11-28 10:14:12 +11:00
Anna Lyons
3017f9b72a Move timestamp_t definition to types.h
it was causing circular references in files where it is defined and
hardware macros are also used.
2017-11-28 10:13:49 +11:00
Hesham Almatary
3d2ae69f9c ARM/SMP: Re-implement atomic exchange taking sel4 IPI into account 2017-11-23 14:35:54 +11:00
Anna Lyons
49a26db19d Combine common arm generic timer code
Previously both aarch32 and aarch64 duplicated common
generic timer code. Unify them in include/arch/arm/machine/timer.h
2017-11-20 14:37:55 +11:00
Anna Lyons
3de2b5cfe9 Initialise gpt_cnt_tval to squash compiler warning 2017-11-20 14:37:55 +11:00
Anna Lyons
fff4f1b580 Make TIMER_RELOAD check 64-bit compatable
This check checks the TIMER_RELOAD fits in the wordsize.
Use UINTPTR_MAX instead of 0xffffffff so the check can be moved
to mode agnostic code.
2017-11-20 14:37:55 +11:00
Anna Lyons
cb81478015 aarch64: add constants for generic timer
This brings the aarch64 generic timer into exactly the same code as
the aarch32 generic timer.
2017-11-20 14:37:55 +11:00
Anna Lyons
c11f18cbf3 ARM generic timers: use aarch agnostic macros 2017-11-20 14:37:55 +11:00
Anna Lyons
07d796790a Add generic macros for aarch32/64 system access
This commit generalises 32 and 64 bit configuration for arm: 32bit uses
coprocessor access through mrc/mcr, 64bit system configuration through
msr,mrs

- SYSTEM_READ|WRITE_WORD: read or write configuration word
- SYSTEM_READ|WRITE_64  : read or write 64bits of configuration
2017-11-20 14:37:55 +11:00
Anna Lyons
4b2114782c Add stdint MAX definitions
- UINTPTR_MAX
- UINT64_MAX
- UINT32_MAX
- INT64_MAX
- INT32_MAX
2017-11-17 14:49:27 +11:00
Adrian Danis
9d4010e0b3 Print single IRQ error
`Arch_checkIRQ` already prints an error message in the case of x86. Printing the additional
error message is both unnecessary, confusing as the message makes no sense on x86. As the
error does make sense on ARM this commit moves the message to the arm `Arch_checkIRQ`
2017-11-10 11:37:34 +11:00
Joel Beeren
092042f7c5 x64: add MODIFIES statements for extern functions
The CParser can't deduce modifies rules for functions without
definitions (like in8, out8 et al and interrupt handler functions).
This adds explicit modifies rules for these functions.
2017-11-09 12:18:31 +11:00
Adrian Danis
4e121d0c48 smp: Use explicit fences instead of volatile
This provides a more robust and efficient implementation that only forces memory reloads
at explicit known points, instead of the over approximation of every time they are
accessed that is forced by volatile.
2017-11-03 11:39:32 +11:00
Adrian Danis
d2644e8ab7 Declare and check IPC buffer size
Adds a named constant of the IPC buffer size bits that can be used when checking the
size/alignment of an IPC buffer. This constant has a compile time assertion to ensure
it corresponds to the actual IPC buffer
2017-10-27 16:12:18 +11:00
Adrian Danis
15c0f0eb75 Increase badge size for endpoints on 64-bit platforms
This unifies the badge size of endpoints and notifications on 64-bit platforms to a
consistent 64-bits, and also changes the libsel4 definitions to match for both.
2017-10-27 12:15:09 +11:00
Adrian Danis
b5854775a5 Increase size of guards on 64-bit platforms
The maximum guard size was unnecessarily restricted to 18 bits as it is on 32-bit
platforms. This change increases it to the current maximum possible of 58 bits.
The 58-bit limitation exists due to the need to encode a guard+guardsize into a
single word for cnode invocations.
2017-10-27 12:15:09 +11:00
Adrian Danis
5f4640dc6c Move cnode_capdata to libsel4 shared types bitfield
This data structure is meant to be the user visible format of the data for a cnode_cap,
yet it is defined in a kernel only bitfield file. Moving it to libsel4 opens up the
possibility of consolidating the definitions in libsel4
2017-10-27 12:14:44 +11:00
Hesham Almatary
00a0577790 Benchmark: account for thread utils on 64-bit archs' fastpath 2017-10-27 09:32:56 +11:00
Adrian Danis
18db530231 Abstract zombie word radixes
Zombie caps perform bit packing that relied on the log2(wordBits), which was being
hard coded to 5. Whilst 5 is the correct value on 32-bit platforms, it is incorrect
on 64-bit ones. This changes the previously hardcoded 5 to be the, already existing,
wordRadix definition.
2017-10-26 11:50:51 +11:00
Adrian Danis
827d9f9705 Merge branch master into zcu102-7.0.0 2017-10-26 11:49:45 +11:00
Nathan Studer
9e5f1e60b6 Make clock check a warning only instead of a hard fault
This clock value isn't set consistently on some platforms due to software
rounding, so halting here tends to happen a lot.  Instead print a warning
and continue on.

For example using a default Xilinx platform with a 33.333... MHz oscialltor
and a default bootloader the clock value will be somewhere in the range
99999000-100000000, which for most practical purposes is the same thing.

Since this register is written by software and doesn't have the precision to
fully represent common hardware oscillator frequencies, this check seems overly
strict anyway.
2017-10-24 13:15:54 -04:00
Adrian Danis
9c6fb53c7f x86: Have single makeUserPDEInvalid function
makeUserPDEPageTableInvalid and makeUserPDELargePageInvalid were both just creating the same
kind of thing, an invalid mapping, which really should be thought of as the third type of
PDE entry type.
2017-10-12 15:06:33 +11:00
Adrian Danis
0d0d231b9d x86: Avoid zero sized array extension
Zero sized arrays are not a C standard extension supported by the C parser. This changes
to the older C90 style for variable length arrays of declaring an array of length 1, as
the C parser also does not suppor the C99 flexible array members.
2017-10-10 11:07:43 +11:00
Adrian Danis
c41a2a8890 x86: Add missing license tag 2017-10-10 11:07:43 +11:00
Alexander Boettcher
4241b2df6f x86: Support for mulitboot2 compatible booting
Declares to a bootloader that we hare multiboot2 compliant and provides an additional
try_boot_sys_mbi2 function for processing a multiboot2 information header.
2017-10-10 11:07:43 +11:00
Alexander Boettcher
566dcdf5f1 x86: Remove assumptions on multiboot1 style booting
This abstracts the existing try_boot_sys into two portions, one which pulls data out
of a multiboot1 style information header, and one which performs generic booting
without being multiboot1 specific.
2017-10-10 11:07:43 +11:00
Adrian Danis
7594ffa877 x86: Explict enum for fault types
This creates a similar structure as ARM, where an `enum` is created with the `#define` values
from libsel4. Having these values as enum types provides a 'real' C symbol for verification.
2017-10-09 16:18:33 +11:00
Alexander Boettcher
023977fc4b x86: Provide copy of RSDP in bootinfo
This gives a rootserver a way to find the ACPI tables in cases where there is no BIOS region
to scan for an RSDP.
2017-10-06 10:08:46 +11:00
Adrian Danis
e8625c6d81 pc99: Provide public function for validating an RSDP
RSDP validation was previously done directly in acpi_init. This splits the validation
into a seperate, publicly useable, function. The intention is for this to be used in
boot scenarios where an RSDP is given and does not need to be searched for.
2017-10-06 10:08:46 +11:00
Adrian Danis
ee380609c6 x86: Copy RSDP table in acpi_init instead of returning physical address of rsdt
The full RSDP is useful beyond just extracting the RSDT address out of it. In particular
this prepares us for being able to pass a copy of the RSDP to the rootserver.

The previous function signature might lead a user to believe that they were getting a
pointer to a useable acpi_rsdt_t structure. This was in fact not the case and was
actually returning the physical address, that may or may not be mapped in, of the rsdt
table. All of the other acpi *_scan functions would therefore immediately map in the physical
rsdt pointer they were given.

This commit changes acpi_init to return a boolean indicating whether it found a valid
rsdp, and then fills in a copy of the rsdp data. The copy is necessary as the rsdp
data may be at a temporary mapping.

As a result of changing acpi_init the boot code and state is changed to have a acpi_rsdt_t
instance that can be filled out.
2017-10-06 10:08:40 +11:00
Matthew Brecknell
afef52acb1 Check syscall irq argument before casting to irq_t
The syscall now rejects all invalid inputs, whereas previously it
silently truncated some invalid inputs.
2017-10-04 22:42:49 +11:00
Adrian Danis
656cbaa1df Use irq_t type for argument to Arch_checkIRQ
This was previously a word_t type, presumably because when the function was originally
written irq_t was a word_t on the platform, this is a mistake and it is more correctly
an irq_t
2017-10-04 22:42:49 +11:00
Adrian Danis
7468ed450c Merge branch benchmark into master 2017-10-04 17:41:04 +11:00
Adrian Danis
65ab9fd9f1 x86: Return instead of failing in mode cap functions
Verification will guarantee that all usages of the parent cap_get* functions will
be correct and that this case does not happen. However, it is difficult to prove
that the `fail` cannot happen in isolation, and is ultimately not neccessary.
2017-10-04 10:45:04 +11:00
Bamboo
3b84ab41e0 [STYLE_FIX] 2017-10-03 01:18:48 +00:00
Adrian Danis
383a6d959f Merge branch zcu102-7.0.0 into master 2017-10-03 12:16:08 +11:00
Adrian Danis
368d5ae65e x86: Use word_t for vm_rights_t instead of uint32_t
This prevents implicit casting and simplifies verification
2017-09-29 10:46:31 +10:00
Robbie VanVossen
4ba89d4aa0 Added 64-bit support for the zynqmp.
Split up the bit specific code into new folders and added 64-bit
support. Also, changed the device register sizes to be based off of
PAGE_BITS instead of a hardcoded number.

TIMER_CLOCK_HZ is set to the default clock rate from the ATF,
which is the same for both AARCH32 and AARCH64.It may require changes
to the FSBL to work correctly.
2017-09-27 12:59:07 -04:00
Robbie VanVossen
02ca6a80a4 Added 32-bit support for the zynqmp.
The Zynq UltraScale+ MPSoC (PLAT zynqmp) is a Multi-Processor SOC
made by Xilinx that has a quad-core Cortex-A53, a dual-core Cortex-R5
and an FPGA.

This adds 32-bit, single-core support on the the Cortex-A53 cluster.
2017-09-27 12:58:49 -04:00
Adrian Danis
95b505bee2 pc99: Make irq_t a uint8_t type instead of an enum type
This renames the previous irq_t enum into a platform_irq_t enum and provides irq_t
as a 'well defined' uint8_t typedef. Having irq_t be an integer type, and not an enum,
is necessary for consistency with verification. As part of explicitly defining irq_t
as an unsigned integer type the definition of irqInvalid is changed to prevent sign
extension leading to unexpected invalid comparisons.
2017-09-26 16:57:10 +10:00
Adrian Danis
128829a919 x86: Rationalize names of paging structures
Changes the name of paging structure entries to more clearly indicate the kind of object
they map to. Generally this is changing a `pde_small` to `pde_pt` to indicate that this
mapping refers to a page table, removing an inconsistency where `pde_large` indicated that
the mapping was for a large page. For the same reason the `ept_pde_4k` type is changed to
`ept_pde_pt` type to reflect what is present in the actual entry.

`pde_large` is left as 'large' and not explicitly given a size as code common between
ia32 and x86-64 manipulates these entities and 'large' is already a used abstraction
over the two potential page sizes so there is need to introduce a formal abstraction layer
and make the names in the structures more specific.
2017-09-12 15:44:17 +10:00
Alexander Boettcher
90055957d7 arm: define guards for benchmark interface
Fixes #69
2017-09-04 13:26:04 +02:00
Adrian Danis
2bf586fe3d x86: Correct return type of servicePendingIRQ
This function returns an interrupt_t, and its call sites expect an interrupt_t,
despite the types being written as irq_t.

Closes #66
2017-08-29 10:56:43 +10:00
Anna Lyons
5627c275ce SMP: add top level migrateTCB
On the MCS kernel, Arch_migrateTCB is called in multiple places.
This commit moves the common code that is required when migrating a TCB
to a top level function to reduce boiler plate.
2017-08-23 11:19:27 +10:00
Adrian Danis
0b73072016 Add a CMake based build system
This commit adds an alternate build system using CMake that operates indepenently of
the existing Kconfig+Kbuild+make based build system
2017-08-22 13:56:26 +10:00
Adrian Danis
f85fb62fe5 SELFOUR-1062: Hide all VT-x related code behind #ifdef guards
The VT-x implementation is not going to be verified at the moment, and so the code for
it needs to be hidden from verification, which we do by #ifdef'ing it out if the VT-x
is not enabled. As a result the VT-x configuration depends on a non verification target
2017-08-21 16:44:58 +10:00
Adrian Danis
a9e1f51713 SELFOUR-1062: Hide all IOMMU related code behind #ifdef guards
The IOMMU implementation is not going to be verified at the moment, and so the code for
it needs to be hidden from verification, which we do by #ifdef'ing it out if the IOMMU
is not enabled. As a result the IOMMU configuration depends on a non verification target
2017-08-21 16:44:58 +10:00
Adrian Danis
8c8b53a5f7 pc99: Define PCI helpers in a pci header instead of iospace header
These helpers are generic PCI and are used outside of the iospace code
2017-08-21 16:44:58 +10:00