This allows for arm headers to be generated for an arm platform
in include/plat/default that specifies the following:
- maxIRQ
- TIMER_CLOCK_HZ
- the timer header to use
- the interrupt controller header to use
This commit updates the ia32 build to pass the c-parser.
- replaces ++i with i++
- use void in functions with no parameters
- add a missing typecast
- remove a void cast of an unused variable
It does not provide any verification guarantees about ia32 code.
The SBI memory was mapped outside the kernel window. This would trigger
an instruction access fault on some hardware, when the bootloader has set
up PMP to protect the SBI memory. Instead of protecting a particular memory
region, the PMP locks the entire page table entry that covers the region.
The PADDR_LOAD and kernel base are adjusted to have the SBI memory
included in the kernel window. So that the SBI memory can be mapped as
part of the kernel image to a separate page table entry. This also
avoids the kernel to allocate untyped memory from the SBI region.
These files can be included normally using libsel4 include paths. This
removes situations where the same file is available under different
include paths due to symlinking into different directory structures.
The C parser produces abbreviations for local variables that depend on
the variable type and the order they appear in the source.
The signature for `get_avail_p_reg` on RISCV has a different type for
`i` than every other function, which causes issues when `hardware.h` is
included early in `kernel_all.c_pp`. Changing the type to `word_t`
avoids these issues.
Note that the auto-generated kernel_devices will differ slightly from
the ones present in the kernel until now. When devices have
registers that aren't page-aligned we now always set the appropriate
PPTR to be the start address of the device, while previously the PPTR
was sometimes page-aligned.
Specifically, this change to PPTRs affects:
- bcm2837 intc
- bcm2837 uart
- allwinnerA20 timer
* Also document the reason why the particular address for KS_LOG_PPTR was chosen.
This patch adds a pointer to the PD entry that sets the benchmark log frame.
- seL4_UserTop is a new constant which represents the top of virtual
memory available to user level
- this commit also rationalises several constants (USER_TOP, kernelBase)
and moves them to the arch level, such that ports only need to define
seL4_UserTop.
Leaves the last entry in the top level page table free so that it can be used for mapping
devices in the future. This moves the kernel image down to the second last entry in the
top level page table. Leaving the last entry in the top level page table also matches the
rv64 design.
This change is required because the zedboard rocket-chip only has
256MiB of memory. Therefore the load address needs to be lowered
to fit in the available range.
This change will also require the kernel to be mapped with 2MiB
granularity so everything is properly page aligned.
Change-Id: I75ddec0be1bb2fd05d0a947ea19bce46e2cd9f96
rpi3 documentation states RAM *should* be mapped from 0x00000000 onwards,
but we omit the start of physical memory as it caused early boot issues
on access. Instead use u-boot's default kernel load address as PHYS_BASE.
Several of the mapping calculations rollover when dealing with 32-bits due to the location
of memory on spike, the kernel/user window addresses, and the kernel load address.
Adjust the kernel window so that it covers the typical location of memory on
spike.
