Commit graph

15 commits

Author SHA1 Message Date
Adrian Danis
d43b717ef1 Move PAD_TO_NEXT_CACHE_LN to util.h
This utility macro is useful beyond just SMP code
2018-01-09 10:10:16 +11:00
Anna Lyons
5627c275ce SMP: add top level migrateTCB
On the MCS kernel, Arch_migrateTCB is called in multiple places.
This commit moves the common code that is required when migrating a TCB
to a top level function to reduce boiler plate.
2017-08-23 11:19:27 +10:00
Hesham Almatary
ee28936d48 SMP: Introduce ENABLE_SMP_SUPPORT
- Make it more readable and less confusing compared to the 'CONFIG_MAX_NUM_NODES > 1' check
2017-06-29 16:23:39 +10:00
Anna Lyons
40c61e5c18 Fix licenses (the rest) 2017-06-22 15:29:12 +10:00
Adrian Danis
eccaae51dc s/D61/DATA61/ in license headers for consistency 2017-02-21 16:38:51 +11:00
Hesham Almatary
0ef7c693ce x86: define L1_CACHE_LINE_SIZE_BITS as with ARM 2017-02-16 15:28:05 +11:00
Hesham Almatary
48d17e1f58 ARM/SMP: Prepare for ARM SMP adding stubs
Currently building ARM/SMP is broken. This commit:
1- Makes it possible to build ARM/SMP with stubs. Run-time SMP for ARM
DOES NOT WORK.
2- Can be a reference for future SMP targets to follow in order to
layout/add the minimal required files and functions needed to support SMP.
3- Builds for Sabre only. In order to support other platforms, ipi
interrupt ID should be defined in machine.h
2017-02-16 15:28:00 +11:00
Hesham Almatary
53c6b52438 SMP: Abstract architecture/platform independent parts of smp.h and ipi.h
This commit is a re-arrangement of SMP directory structure to make it
easier for other architectures/platforms (in general) and ARM (in
particular) to add SMP support.

* new include/smp directory to act as a centralised container of
"shared" architecture-independent SMP headers.
This makes it clearer what's needed for other architecture/platform to
support SMP.
* Each platform can define its own unique ipi.[h|c] that make sense,
since ipi implementation is SoC/platform dependent.
2017-01-13 15:35:41 +11:00
amrzar
25bb94372f SELFOUR-635: support for TCB operations
This will update TCB invocations to consider multicore environment, this may include:
- adds the affinity invocation to transfer TCB between different cores and update TCB structure for core ID
- checking the thread/core state before performing TCB operation, e.g. deleting the runnable TCB, etc
2016-10-30 08:59:32 +11:00
Adrian Danis
b90238d089 Replace #pragma once with include guards 2016-10-21 12:05:02 +11:00
Bamboo
e1d4ffd13e [STYLE_FIX] 2016-10-12 00:17:10 +00:00
amrzar
f80be7055b Add VISIBLE attrubute to UP states 2016-10-12 10:11:51 +11:00
amrzar
2cbc7123b6 SELFOUR-630:preliminary booting application processors
- update core detection code and Kconfig file
    - update kernel stack managment so that BSP does not use boot stack before IPI APs
    - move arch dependant data to a single structure
    - add cache line size to Kconfig
    - add cpu indexing and apic id mapping
    - boot APs to halting state
    - add guard for kernel stack if there is only one core
2016-09-28 16:10:25 +10:00
Adrian Danis
4044e20412 Revert "Merge pull request #358 in SEL4/sel4 from ~AZARRABI/sel4:multicore to master"
This reverts commit ce2f666bb8, reversing
changes made to dc183f96b8.
2016-09-22 14:22:18 +10:00
amrzar
fbc071b4f1 SELFOUR-630:preliminary booting application processors
- update core detection code and Kconfig file
- update kernel stack managment so that BSP does not use boot stack before IPI APs
- move arch dependant data to a single structure
- add cache line size to Kconfig
- add cpu indexing and apic id mapping
- boot APs to halting state
- add guard for kernel stack if there is only one core
2016-09-21 12:14:10 +10:00