Commit graph

518 commits

Author SHA1 Message Date
Adrian Danis
fc56575ea6 x64: Define TLB bitmap region
Defines the TLB bitmap to be located, virtually, just below the kernel
window. To get an initialized bitmap in each new address space we
change copyGlobalMappings to copy from USER_TOP (which includes the
initialized TLB bitmap in the global address space) instead of just
the kernel window base
2016-11-22 14:05:55 +11:00
Adrian Danis
d14a973a3d x86: Pass address space when invalidating ASID
For efficient TLB coherency on x86-64 it will be useful to know
the address space that the ASID being invalidated was last assigned to
2016-11-22 13:58:44 +11:00
amrzar
135b320b3b x86: extend APIC to support cluster IPIs 2016-11-22 13:43:37 +11:00
Adrian Danis
117c53e583 imx32: Update autoconf.h for standalone build 2016-11-22 11:53:29 +11:00
Adrian Danis
febe070a28 x86: increase IPI words to 3 2016-11-22 11:51:15 +11:00
Adrian Danis
d393278c0c ia32: Use wrappers for remote ops 2016-11-22 11:51:15 +11:00
Adrian Danis
db0a8184e7 SELFOUR-553: Update standalone kernel configurations
This changes the kernel configurations for the verified platform to
not use the globals frame.
2016-11-22 11:49:52 +11:00
Adrian Danis
e78cdf9b64 SELFOUR-553: Support alternate IPC buffer locations without globals frame
This commit adds support for using the ThreadID registers of the ARM MPCore
platforms for storing the address of the IPC buffer instead of the globals
frame. The choice of using the user readable/writeable ThreadID register
is chosen, even though it means the user cannot use it for its own
purposes, as it leaves room in the future for doing TLS support in the
user read only register, where compilers expect it.
2016-11-22 11:49:52 +11:00
Adrian Danis
9f99e77c38 SELFOUR-553: Support ARM MPCore registers
This commit adds support for saving/restoring an additional register
that exists on ARM MPCore platforms. As this register is user wrieable,
as well as readable, it must saved and restored by the kernel to
prevent gross information channels.
2016-11-22 11:49:52 +11:00
Bamboo
1875861937 [STYLE_FIX] 2016-11-22 11:13:46 +11:00
amrzar
27afc1bd92 x86: add logical id mapping for x2APIC IPI boradcasting 2016-11-22 09:40:31 +11:00
Amirreza Zarrabi
becdb483a8 Merge pull request #506 in SEL4/sel4 from ~AZARRABI/sel4:x2apic_fence to master
* commit 'b216c194faacfa070ee963ede54c8020d6494f24':
  x86: add mfence as X2APIC MSRs are not serializing
2016-11-21 09:58:38 +11:00
Adrian Danis
51a0fad68c Merge pull request #505 in SEL4/sel4 from ~ADANIS/sel4:likely to master
* commit 'edc811a872e5d709c2ff78fadf85573cb51b6304':
  x86: Add likely to isValidVTableRoot_fp
2016-11-21 09:53:26 +11:00
amrzar
b216c194fa x86: add mfence as X2APIC MSRs are not serializing 2016-11-21 08:20:38 +11:00
Adrian Danis
edc811a872 x86: Add likely to isValidVTableRoot_fp
Although this function is called from the fastpath inside of an
`unlikely` macro and the function itself gets inlined, the knowledge
that this conjunction is unlikely is somehow lost. Explicitly putting
a `likely` here fixes it
2016-11-18 16:36:40 +11:00
Anna Lyons
8452068cc3 Move migration logic to own function
This makes it easier to port to the RT branch, where
migration can happen in several different places.
2016-11-18 16:34:13 +11:00
Adrian Danis
31628d9a58 Remove recycle
Removes the recycle operation and adds an operation
to cancel any badged sends on and endpoint. Calling
Revoke + CancelBadgedSend is equivalent to Recycle
on a badged endpoint
2016-11-18 14:10:01 +11:00
amrzar
2955bd46b2 add x2apic to x86-64 autoconfig 2016-11-18 07:26:12 +11:00
Amirreza Zarrabi
af81bb0fd5 Merge pull request #499 in SEL4/sel4 from ~AZARRABI/sel4:x2apic to master
* commit 'd746cc9cf61b6f50aee6aacf89e91b1f555b1a88':
  x86: enable support for x2APIC
2016-11-18 07:13:15 +11:00
amrzar
d746cc9cf6 x86: enable support for x2APIC 2016-11-17 16:32:57 +11:00
Adrian Danis
8a6936ff1d Remove incorrect CONST usage
This removes usages of CONST Arch_activateIdleThread. According to
gcc 'a function that has pointer arguments and examines the data
pointed to must not be declared const'. Whilst these functions do
not presently examine their tcb_t pointer argument, it seems
pointless to pass something that can never be safely looked at.

Further a function that returns void and is CONST is utterly meaningless
2016-11-17 11:51:46 +11:00
Adrian Danis
7f76749448 Revert SELFOUR-242
This reverts commits
3aee0ab7b3
6b6b965528
a1421832ac
2016-11-16 14:02:11 +11:00
Anna Lyons
a1421832ac SELFOUR-242: invert bitfield scheduler & optimise
This commit does the following:

* invert the bit field scheduler for better cache performance for high priority threads
* peeks into the bitfield scheduler to allow fastpath to be leveraged when IPC occurs from lo --> hi priority threads if correct
2016-11-15 09:45:48 +11:00
Adrian Danis
90f6a9863b x86: Initial support for SMP vt-x
Enables vt-x code to compile when CONFIG_MAX_NUM_NODES is set to
greater than 1 and adds code to manage VMCS state on different cores
2016-11-11 14:04:39 +11:00
Adrian Danis
2c49729da5 x86: Refactor tlb_bitmap to be mode generic
Refactors the TLB bitmap code to be generic across ia32 and x86-64.
2016-11-09 15:24:17 +11:00
Adrian Danis
9c91fc8f42 x86: Refactor generic x86 pte/pde manipulation
Previously generic functions for manipulating page table and page
directory entries were placed in mode/structures.h. These are moved
to a mode/vspace.h instead so that they can use existing functions
defined in arch/vspace.h.

The x86_make_pde_mapping function is dropped in this move as it is
not used. Instead it is replaced with a function for creating an
empty mapping for whatever is the vspace root.
2016-11-09 15:23:40 +11:00
amrzar
ffd0f34b39 Clean up x86KScurInterrupt:
1. Remove the locking dependancy on the value of x86KScurInterrupt
2. Remove confusing set/unset of x86KScurInterrupt
2016-11-09 14:22:04 +11:00
amrzar
b46e98c10e smp: solve bug in tlb_bitmap
1. Missing loop counter when accessing to PD in 'tlb_bitmap_get'.
2. Missing 'TLBBITMAP_PD_INDEX' in 'TLBBITMAP_PD_MAKE_INDEX'. The index generated by 'TLBBITMAP_PD_MAKE_INDEX' should be valid in PD while the original one used to generate just 0, 1, etc. The correct index is '0 + TLBBITMAP_PD_INDEX', '1 + TLBBITMAP_PD_INDEX' and so on.
2016-11-09 10:00:56 +11:00
Bamboo
846254be1f [STYLE_FIX] 2016-11-08 05:55:43 +00:00
Anna Lyons
c86669df43 x86: export tsc freq in bootinfo
We read the frequency from the platform info MSR and export it to the
user for accurate timing (for platforms that support platform into)
2016-11-08 14:46:18 +11:00
Adrian Danis
828a14d853 SELFOUR-222: Configure IRQ cnode size per platform 2016-11-08 11:48:31 +11:00
Adrian Danis
808f68e1be x64: Mode specific IPI definitions 2016-11-07 15:02:29 +11:00
Adrian Danis
9899c60c8b x86: Reduce number of irqs to 128
On x86-64 the irq cnode will be larger than a page if there is more
than 128 irqs.
2016-11-07 14:58:46 +11:00
Adrian Danis
1173e19aa6 x86: kernelSP only needed for ia32 2016-11-07 14:58:46 +11:00
Adrian Danis
6f908324f8 x64: Access core local state correctly 2016-11-07 14:58:46 +11:00
Adrian Danis
8b5ec01626 x86: Split IPIs into arch and mode portions 2016-11-07 14:53:46 +11:00
amrzar
44fc989cc5 Store remote FPU state 2016-11-07 14:41:25 +11:00
Bamboo
b90b715818 [STYLE_FIX] 2016-11-07 13:27:52 +11:00
Adrian Danis
61c1a4c4ff x64: Mode specific smp file 2016-11-07 12:18:43 +11:00
Adrian Danis
a726b4bea5 x86: Split CPU ID management into mode and general
This moves getCurrentCPUIndex into a mode specific smp header, and
moves wrappers that use it into the generap smp header
2016-11-07 11:46:08 +11:00
Adrian Danis
76b9441eee x86: Remove unused function 2016-11-07 11:44:57 +11:00
amrzar
056dbf811b SELFOUR-634: support for TLB and cache management 2016-11-07 10:55:05 +11:00
Anna Lyons
4a82597b7a trivial: change remoteTCBStall to take tcb
Instead of cap_t. This allows the function to be used from other
functions that have the tcb pointer and not the cap.
2016-11-07 10:37:17 +11:00
Adrian Danis
ab91c11a4f Merge pull request #459 in SEL4/sel4 from ~ADANIS/sel4:smmu to master
* commit '858fa717c6a30fe1f0514c4ad8bbbe1003016864':
  tk1: Remove temporary SMMU memory mapping support
  arm: Remove lookup error message
  arm: Correctly mask SMMU PT addresses
  tk1: Correct SMMU PD and PT indexing
2016-11-03 05:05:38 +00:00
Adrian Danis
a85472a951 x86: Always consider FPU owernship of threads core
When checking if a thread is using the FPU or not we now check on that
threads core, under the assumption that if a thread migrates its FPU
state is explicitly (and not lazily) migrated.
2016-11-03 10:18:24 +11:00
Adrian Danis
858fa717c6 tk1: Remove temporary SMMU memory mapping support 2016-11-02 15:12:56 +11:00
Adrian Danis
e3be5fa8e4 tk1: Correct SMMU PD and PT indexing 2016-11-02 15:12:56 +11:00
amrzar
3b19198bf4 Include vspace remote call support 2016-11-02 15:00:19 +11:00
amrzar
658eb090db Extend IPI for two function parameters 2016-11-02 13:47:29 +11:00
Thomas Sewell
03c71b63e1 SELFOUR-444: Preemptible zeroing for retype.
Change to the order of operations and timing behaviour of
invokeUntyped_Retype. The Retype operation now zeroes the
entire range of the Untyped cap (if it is being used for
the first time) before installing any objects. This avoids
the need for long-running initialisation of large objects,
whose initial contents are always zero. The initial zeroing
phase is preemptible, and may take multiple timeslices to
complete.
2016-11-01 17:05:36 +11:00