0c6229d598
This adds sufficient kernel support for the GICv3 interrupt controller to be used in a virtualization context on aarch64. This set of changes has some limitations, however it is still an improvement on the status quo. Limitations: 1: This only provides support for aarch64. Anyone wanting support for aarch32 + GICv3 + virtualization would need to add additional code. 2: This code only supports 32 priority levels. Support for more than 32 priority requires changing the get/set_gic_vcpu_ctrl_apr interface. This is feasible, but requires a more invasive set of changes. 32 priority levels has been shown to be sufficient in practise. Impacts on verification: This set of changes should only impact Aarch64 Hypervisor configurations. This is not yet verified so should not have an impact on verification. Level of testing: This has been tested on an iMX8QXP based board. Testing has at this point in time been limited to a single virtual machine. Note: support for this board is not yet upstrea, but is currently being prepared. Explanation of changes: Ideally a new config item would not be required and this could be driven purely by DTS and hardware.yml configuration. However, the structures.bf requires changes. This can only deal with config.h header files, not other more complex header files. As such it was necessary to introduce a config item which can be used for this purpose. The appropriate platforms (as determined by examination of DTS files) have been updated with the appropriate config setting. This config setting only has any relevance if hypervisor mode is already enabled, so should not cause any difficulty for existing code or configuration. Note: No testing has been performed on the updated platforms. There may be alternative factorings of this, which could be considered in future work. Signed-off-by: Ben Leslie <benno@brkawy.com> |
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| riscv/arch | ||
| x86/arch | ||