seL4/include/arch
Axel Heider 6b8cbc96d1 risc-v: add comment about SBI constants
Explan the origin of the SBI constants.

Signed-off-by: Axel Heider <axel.heider@hensoldt-cyber.de>
2021-09-07 20:09:26 +10:00
..
arm arm,gic: GICv3 only supports max 16 list registers 2021-09-03 10:23:06 +10:00
riscv/arch risc-v: add comment about SBI constants 2021-09-07 20:09:26 +10:00
x86/arch trivial: remove trailing empty lines 2021-08-27 21:15:11 +10:00