55aee64707
On AArch64, if this is int, we encounter a situation where we can't prove equivalence with the abstract spec without an extra invariant that the number of these registers isn't zero (to satisfy 32<->64 bit casts). Sticking with word size will make sense on both 32 and 64 bit. Signed-off-by: Rafal Kolanski <rafal.kolanski@proofcraft.systems> |
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| arm | ||
| riscv/arch | ||
| x86/arch | ||